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Fabien-ChouteauFabien-Chouteau
committed
Start CNC controller on the STM32F4-DISCO
1 parent 5746b9d commit a409db9

9 files changed

+501
-1
lines changed

‎.gitignore

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@@ -2,6 +2,8 @@
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*.o
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*.exe
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*.cgpr
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*#
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*.db
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*-loc.xml
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# Ada Library Information
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*.ali

‎gcode/src/gcode-planner.adb

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with Bounded_Buffers_Blocking_Consumer;
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with Bounded_Buffers_Blocking_Producer;
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with Ada.Real_Time; use Ada.Real_Time;
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with System;
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package body Gcode.Planner is
@@ -180,6 +181,7 @@ package body Gcode.Planner is
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Seg_Time : Float_Value;
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pragma Unreferenced (Seg_Time);
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begin
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delay until Time_Last;
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loop
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-- Blocking call

‎stm32f4-disco_controller/obj/.gitignore

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# Ignore everything in this directory
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*
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# Except this file
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!.gitignore

‎stm32f4-disco_controller/src/coms.adb

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with Ada.Unchecked_Conversion;
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with STM32; use STM32;
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with STM32_SVD;
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package body Coms is
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use type STM32_SVD.UInt9;
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type DMA_Data is array (Integer range <>) of Interfaces.Unsigned_8;
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-------------------------------
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-- Initialize_GPIO_Port_Pins --
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-------------------------------
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procedure Initialize_GPIO_Port_Pins is
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Configuration : GPIO_Port_Configuration;
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begin
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Enable_Clock (IO_Port);
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Configuration.Mode := Mode_AF;
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Configuration.Speed := Speed_50MHz;
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Configuration.Output_Type := Push_Pull;
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Configuration.Resistors := Pull_Up;
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Configure_IO
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(Port => IO_Port,
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Pins => Rx_Pin & Tx_Pin,
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Config => Configuration);
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Configure_Alternate_Function
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(Port => IO_Port,
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Pins => Rx_Pin & Tx_Pin,
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AF => Transceiver_AF);
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end Initialize_GPIO_Port_Pins;
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----------------------
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-- Initialize_USART --
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----------------------
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procedure Initialize_USART is
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begin
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Enable_Clock (Transceiver);
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Enable (Transceiver);
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Set_Baud_Rate (Transceiver, 115_200);
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Set_Mode (Transceiver, Tx_Rx_Mode);
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Set_Stop_Bits (Transceiver, Stopbits_1);
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Set_Word_Length (Transceiver, Word_Length_8);
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Set_Parity (Transceiver, No_Parity);
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Set_Flow_Control (Transceiver, No_Flow_Control);
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end Initialize_USART;
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--------------------
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-- Initialize_DMA --
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--------------------
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procedure Initialize_DMA is
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Configuration : DMA_Stream_Configuration;
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begin
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Enable_Clock (Controller);
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Configuration.Channel := Tx_Channel;
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Configuration.Direction := Memory_To_Peripheral;
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Configuration.Increment_Peripheral_Address := False;
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Configuration.Increment_Memory_Address := True;
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Configuration.Peripheral_Data_Format := Bytes;
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Configuration.Memory_Data_Format := Bytes;
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Configuration.Operation_Mode := Normal_Mode;
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Configuration.Priority := Priority_Very_High;
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Configuration.FIFO_Enabled := True;
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Configuration.FIFO_Threshold := FIFO_Threshold_Full_Configuration;
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Configuration.Memory_Burst_Size := Memory_Burst_Inc4;
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Configuration.Peripheral_Burst_Size := Peripheral_Burst_Inc4;
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Configure (Controller, Tx_Stream, Configuration);
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-- note the controller is disabled by the call to Configure
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end Initialize_DMA;
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---------------
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-- Initalize --
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---------------
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procedure Initalize is
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begin
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Initialize_GPIO_Port_Pins;
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Initialize_USART;
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Initialize_DMA;
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Enable (Transceiver);
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Enable_Interrupts (Transceiver, Source => Received_Data_Not_Empty);
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end Initalize;
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----------------------------
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-- UART_Get_Data_Blocking --
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----------------------------
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procedure UART_Get_Data_Blocking (C : out Character) is
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function Data_To_Character is new Ada.Unchecked_Conversion
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(Interfaces.Unsigned_8, Character);
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Rx_Byte : Interfaces.Unsigned_8;
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begin
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Rx_IRQ_Handler.Await_Byte_Reception (Rx_Byte);
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C := Data_To_Character (Rx_Byte);
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end UART_Get_Data_Blocking;
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---------------------------------
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-- UART_Send_DMA_Data_Blocking --
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---------------------------------
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procedure UART_Send_DMA_Data_Blocking
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(Data : String)
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is
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function Character_To_Data is new Ada.Unchecked_Conversion
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(Character, Interfaces.Unsigned_8);
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Source_Block : DMA_Data (Data'Range);
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begin
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for Index in Source_Block'Range loop
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Source_Block (Index) := Character_To_Data (Data (Index));
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end loop;
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Start_Transfer_with_Interrupts
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(Controller,
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Tx_Stream,
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Source => Source_Block'Address,
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Destination => Data_Register_Address (Transceiver),
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Data_Count => Half_Word (Source_Block'Length));
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-- also enables the stream
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Enable_DMA_Transmit_Requests (Transceiver);
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Tx_IRQ_Handler.Await_Transfer_Complete;
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end UART_Send_DMA_Data_Blocking;
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-------------------------------
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-- Finalize_DMA_Transmission --
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-------------------------------
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procedure Finalize_DMA_Transmission (Transceiver : in out USART) is
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-- see static void USART_DMATransmitCplt
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begin
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loop
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exit when Status (Transceiver, Transmission_Complete_Indicated);
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end loop;
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Clear_Status (Transceiver, Transmission_Complete_Indicated);
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Disable_DMA_Transmit_Requests (Transceiver);
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end Finalize_DMA_Transmission;
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--------------------
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-- Tx_IRQ_Handler --
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--------------------
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protected body Tx_IRQ_Handler is
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-----------------------------
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-- Await_Transfer_Complete --
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-----------------------------
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entry Await_Transfer_Complete when Transfer_Complete is
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begin
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Event_Occurred := False;
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Transfer_Complete := False;
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end Await_Transfer_Complete;
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-----------------
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-- IRQ_Handler --
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-----------------
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procedure IRQ_Handler is
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begin
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-- Transfer Error Interrupt management
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if Status (Controller, Tx_Stream, Transfer_Error_Indicated) then
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if Interrupt_Enabled
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(Controller, Tx_Stream, Transfer_Error_Interrupt)
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then
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Disable_Interrupt
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(Controller, Tx_Stream, Transfer_Error_Interrupt);
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Clear_Status (Controller, Tx_Stream, Transfer_Error_Indicated);
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Event_Kind := Transfer_Error_Interrupt;
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Event_Occurred := True;
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return;
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end if;
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end if;
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-- FIFO Error Interrupt management.
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if Status (Controller, Tx_Stream, FIFO_Error_Indicated) then
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if Interrupt_Enabled
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(Controller, Tx_Stream, FIFO_Error_Interrupt)
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then
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Disable_Interrupt (Controller, Tx_Stream, FIFO_Error_Interrupt);
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Clear_Status (Controller, Tx_Stream, FIFO_Error_Indicated);
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Event_Kind := FIFO_Error_Interrupt;
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Event_Occurred := True;
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return;
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end if;
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end if;
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-- Direct Mode Error Interrupt management
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if Status (Controller, Tx_Stream, Direct_Mode_Error_Indicated) then
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if Interrupt_Enabled
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(Controller, Tx_Stream, Direct_Mode_Error_Interrupt)
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then
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Disable_Interrupt
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(Controller, Tx_Stream, Direct_Mode_Error_Interrupt);
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Clear_Status
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(Controller, Tx_Stream, Direct_Mode_Error_Indicated);
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Event_Kind := Direct_Mode_Error_Interrupt;
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Event_Occurred := True;
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return;
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end if;
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end if;
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-- Half Transfer Complete Interrupt management
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if Status
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(Controller, Tx_Stream, Half_Transfer_Complete_Indicated)
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then
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if Interrupt_Enabled
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(Controller, Tx_Stream, Half_Transfer_Complete_Interrupt)
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then
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if Double_Buffered (Controller, Tx_Stream) then
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Clear_Status
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(Controller, Tx_Stream, Half_Transfer_Complete_Indicated);
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else -- not double buffered
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if not Circular_Mode (Controller, Tx_Stream) then
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Disable_Interrupt
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(Controller,
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Tx_Stream,
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Half_Transfer_Complete_Interrupt);
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end if;
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Clear_Status
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(Controller, Tx_Stream, Half_Transfer_Complete_Indicated);
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end if;
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Event_Kind := Half_Transfer_Complete_Interrupt;
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Event_Occurred := True;
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end if;
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end if;
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-- Transfer Complete Interrupt management
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if Status (Controller, Tx_Stream, Transfer_Complete_Indicated) then
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if Interrupt_Enabled
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(Controller, Tx_Stream, Transfer_Complete_Interrupt)
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then
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if Double_Buffered
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(Controller, Tx_Stream)
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then
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Clear_Status
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(Controller, Tx_Stream, Transfer_Complete_Indicated);
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-- TODO: handle the difference between M0 and M1 callbacks
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else
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if not Circular_Mode (Controller, Tx_Stream) then
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Disable_Interrupt
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(Controller, Tx_Stream, Transfer_Complete_Interrupt);
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end if;
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Clear_Status
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(Controller, Tx_Stream, Transfer_Complete_Indicated);
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end if;
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Finalize_DMA_Transmission (Transceiver);
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Event_Kind := Transfer_Complete_Interrupt;
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Event_Occurred := True;
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Transfer_Complete := True;
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end if;
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end if;
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end IRQ_Handler;
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end Tx_IRQ_Handler;
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--------------------
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-- Rx_IRQ_Handler --
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--------------------
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protected body Rx_IRQ_Handler is
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--------------------------
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-- Await_Byte_Reception --
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--------------------------
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entry Await_Byte_Reception (Rx_Byte : out Interfaces.Unsigned_8)
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when Byte_Avalaible is
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begin
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-- Dequeue (Rx_Queue, Rx_Byte);
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-- Byte_Avalaible := not Is_Empty (Rx_Queue);
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Rx_Byte := Data;
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Byte_Avalaible := False;
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end Await_Byte_Reception;
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-----------------
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-- IRQ_Handler --
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-----------------
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procedure IRQ_Handler is
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Received_Byte : Interfaces.Unsigned_8;
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begin
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if Status (Transceiver, Read_Data_Register_Not_Empty) then
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Received_Byte :=
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Interfaces.Unsigned_8 (Current_Input (Transceiver) and 16#FF#);
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Clear_Status (Transceiver, Read_Data_Register_Not_Empty);
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-- Enqueue (Rx_Queue, Received_Byte);
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Data := Received_Byte;
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Byte_Avalaible := True;
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end if;
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end IRQ_Handler;
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end Rx_IRQ_Handler;
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end Coms;

‎stm32f4-disco_controller/src/coms.ads

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with STM32.Device; use STM32.Device;
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with STM32.GPIO; use STM32.GPIO;
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with STM32.USARTs; use STM32.USARTs;
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with STM32.Timers; use STM32.Timers;
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with STM32.DMA; use STM32.DMA;
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with Ada.Interrupts;
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with Ada.Interrupts.Names; use Ada.Interrupts.Names;
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with Interfaces;
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package Coms is
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procedure Initalize;
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procedure UART_Send_DMA_Data_Blocking (Data : String);
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procedure UART_Get_Data_Blocking (C : out Character);
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private
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IO_Port : GPIO_Port renames GPIO_A;
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Transceiver : USART renames USART_2;
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Transceiver_AF : constant GPIO_Alternate_Function := GPIO_AF_USART2;
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TX_Pin : constant GPIO_Pin := Pin_2;
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RX_Pin : constant GPIO_Pin := Pin_3;
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Controller : STM32.Device.DMA_Controller renames STM32.Device.DMA_1;
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Tx_Channel : constant DMA_Channel_Selector := Channel_4;
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Tx_Stream : constant DMA_Stream_Selector := Stream_6;
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DMA_Tx_IRQ : constant Ada.Interrupts.Interrupt_Id := DMA1_Stream6_Interrupt;
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-- must match that of the selected controller and stream number!!!!
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-- DMA Interrupt Handler for transmission.
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protected Tx_IRQ_Handler is
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pragma Interrupt_Priority;
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entry Await_Transfer_Complete;
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private
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Event_Occurred : Boolean := False;
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Transfer_Complete : Boolean := False;
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Event_Kind : DMA_Interrupt;
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procedure IRQ_Handler;
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pragma Attach_Handler (IRQ_Handler, DMA_Tx_IRQ);
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end Tx_IRQ_Handler;
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-- Interrupt Handler for reception (DMA not used here).
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protected Rx_IRQ_Handler is
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pragma Interrupt_Priority;
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entry Await_Byte_Reception (Rx_Byte : out Interfaces.Unsigned_8);
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private
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Byte_Avalaible : Boolean := False;
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Data : Interfaces.Unsigned_8;
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-- Rx_Queue : T_Queue (UART_RX_QUEUE_SIZE);
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procedure IRQ_Handler;
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pragma Attach_Handler (IRQ_Handler, USART2_Interrupt);
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end Rx_IRQ_Handler;
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end Coms;

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