From 2be7b13d84dc637bb64d2aa71de633b7bc09a7ba Mon Sep 17 00:00:00 2001 From: daquexian Date: Tue, 28 May 2019 17:24:51 +0800 Subject: [PATCH 01/24] Update README --- README.md | 4 ++-- README_CN.md | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/README.md b/README.md index 8ab627b..cf99a1a 100644 --- a/README.md +++ b/README.md @@ -46,9 +46,9 @@ The following is the comparison between our dabnn and [Caffe](http://caffe.berke ## Convert ONNX Model -We provide a conversion tool, named onnx2bnn, to convert an ONNX model to a dabnn model. To get the conversion tool, just build the project using the native toolchain (instead of arm cross-compiling toolchain). For Linux users, we provide pre-built onnx2bnn AppImage. Linux users can download it from [GitHub Releases](https://github.com/JDAI-CV/dabnn/releases). For the usage and other information about AppImage, please check out https://appimage.org . +We provide a conversion tool, named onnx2bnn, to convert an ONNX model to a dabnn model. We provide onnx2bnn pre-built binaries for all platforms in [GitHub Releases](https://github.com/JDAI-CV/dabnn/releases). For Linux users, the onnx2bnn pre-built binary is [AppImage](https://appimage.org) format, see https://appimage.org for details. -Note: Binary convolution is a custom operator, so whether the ONNX model is dabnn-comptabile heavily depends on the implementation of the binary convolution in the training code. We will soon provide an dabnn-comptabile PyTorch implementation of binary convolution. +Note: Binary convolution is a custom operator, so whether the ONNX model is dabnn-comptabile heavily depends on the implementation of the binary convolution in the training code. Please check out [our wiki](https://github.com/JDAI-CV/dabnn/wiki/Train,-export-and-convert-a-dabnn-model) for the further information. After conversion, the generated dabnn model can be deployed on armv8 devices. For Android developer, we have provided Android AAR package and published it on [jcenter](https://bintray.com/daquexian566/maven/dabnn/_latestVersion), for the usage please check out [example project](https://github.com/JDAI-CV/dabnn-example). diff --git a/README_CN.md b/README_CN.md index 0d7a4ef..b93dca6 100644 --- a/README_CN.md +++ b/README_CN.md @@ -48,9 +48,9 @@ dabnn_bireal18_imagenet_stem 43279353 ns 41533009 ns 14 <--- ## 如何转换 ONNX 模型 -我们提供模型转换工具 onnx2bnn 将 ONNX 模型转换为 dabnn 格式的模型。用本地编译工具链（而不是 arm 交叉编译工具链）编译这个项目就可以编译出 onnx2dnn。对 Linux 用户我们提供可以在 Linux 下无需编译直接运行的 AppImage，从 [GitHub Releases](https://github.com/JDAI-CV/dabnn/releases) 下载即可。AppImage 的使用方法和其它相关信息请参考 https://appimage.org/。 +我们提供模型转换工具 onnx2bnn 将 ONNX 模型转换为 dabnn 格式的模型。在 [GitHub Releases](https://github.com/JDAI-CV/dabnn/releases) 里有各个平台的 onnx2bnn 预编译二进制文件，可以直接下载运行。Linux 用户我们提供的是 AppImage 格式的二进制文件，AppImage 的使用方法和其它相关信息请参考 https://appimage.org/。 -注意：因为二值卷积是一种自定义操作，所以 ONNX 模型是否与 dabnn 兼容极大程度上依赖于训练代码中二值卷积的实现。我们很快会提供一个与 dabnn 兼容的二值卷积 PyTorch 实现。 +注意：因为二值卷积是一种自定义操作，所以 ONNX 模型是否与 dabnn 兼容极大程度上依赖于训练代码中二值卷积的实现，在 [wiki](https://github.com/JDAI-CV/dabnn/wiki/Train,-export-and-convert-a-dabnn-model) 中有详细的进一步描述。 转换完成后得到的 dabnn 模型就可以在 armv8 设备上使用。对 Android 开发者我们已经把 Android AAR 包上传到了 [jcenter](https://bintray.com/daquexian566/maven/dabnn/_latestVersion)，使用方法请看[示例工程](https://github.com/JDAI-CV/dabnn-example)。 From 132ca100790e9824b1bd457ca668da99eedcacfc Mon Sep 17 00:00:00 2001 From: daquexian Date: Tue, 28 May 2019 19:45:47 +0800 Subject: [PATCH 02/24] Use ninja instead of make in net_test configuration --- .daq_pm/configs/net_test | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.daq_pm/configs/net_test b/.daq_pm/configs/net_test index 6bf0eae..31da42e 100644 --- a/.daq_pm/configs/net_test +++ b/.daq_pm/configs/net_test @@ -3,5 +3,5 @@ name binary-nn type cpp build_dir build_net_test target net_test -cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja binary ~/adb_push_and_run.sh tests/net_test From c039558283d5f27fe2338c386cad91ba49e0ebfa Mon Sep 17 00:00:00 2001 From: daquexian Date: Tue, 28 May 2019 19:47:34 +0800 Subject: [PATCH 03/24] 1. Update CMakeLists.txt to support non-Android aarch64 devices 2. Add guard on optimized methods, and delegate to non-optimized methods on unsupported devices --- .daq_pm/configs/bconv_test_x86 | 7 +++++++ .daq_pm/configs/net_test_x86 | 7 +++++++ CMakeLists.txt | 15 +++++++++------ cmake/system.cmake | 3 ++- dabnn/bconv.h | 15 +++++++++++++++ dabnn/bgemm.h | 13 +++++++++++-- dabnn/bitpack.h | 6 ++++++ dabnn/layers/AvePool.cpp | 7 +++++++ dabnn/layers/BinConv.cpp | 8 ++++++++ dabnn/layers/MaxPool.cpp | 6 ++++++ dabnn/layers/Relu.cpp | 7 +++++++ dabnn/net.cpp | 4 ++++ tests/bconv_test.cpp | 4 ++-- 13 files changed, 91 insertions(+), 11 deletions(-) create mode 100644 .daq_pm/configs/bconv_test_x86 create mode 100644 .daq_pm/configs/net_test_x86 diff --git a/.daq_pm/configs/bconv_test_x86 b/.daq_pm/configs/bconv_test_x86 new file mode 100644 index 0000000..f8c6d11 --- /dev/null +++ b/.daq_pm/configs/bconv_test_x86 @@ -0,0 +1,7 @@ +# It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) +name binary-nn +type cpp +build_dir build_bconv_test_x86 +target bconv_test +cmake_options -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DBNN_BUILD_MAIN_LIB=ON -GNinja +binary tests/bconv_test diff --git a/.daq_pm/configs/net_test_x86 b/.daq_pm/configs/net_test_x86 new file mode 100644 index 0000000..9d5268d --- /dev/null +++ b/.daq_pm/configs/net_test_x86 @@ -0,0 +1,7 @@ +# It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) +name binary-nn +type cpp +build_dir build_net_test_x86 +target net_test +cmake_options -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -DBNN_BUILD_MAIN_LIB=ON -GNinja +binary tests/net_test diff --git a/CMakeLists.txt b/CMakeLists.txt index 9525b24..3644bb0 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -22,11 +22,15 @@ option(BNN_SYSTEM_PROTOBUF "Use system protobuf to build onnx2bnn" ON) option(BNN_BUILD_PYTHON "Build onnx2bnn python interface" OFF) option(BNN_USE_MSVC_STATIC_RUNTIME "Link onnx2bnn to msvc static runtime" ON) -if (${CMAKE_SYSTEM_NAME} STREQUAL "Android") - set(BNN_BUILD_ANDROID ON) -else() - set(BNN_BUILD_ANDROID OFF) +message(STATUS "Target architecture: ${CMAKE_SYSTEM_PROCESSOR}") +if (NOT DEFINED BNN_BUILD_MAIN_LIB) + if (${CMAKE_SYSTEM_PROCESSOR} STREQUAL "aarch64") + set(BNN_BUILD_MAIN_LIB ON) + else() + set(BNN_BUILD_MAIN_LIB OFF) + endif() endif() +message(STATUS "BNN_BUILD_MAIN_LIB: ${BNN_BUILD_MAIN_LIB}") include(cmake/utils.cmake) bnn_add_msvc_runtime_flag() @@ -42,7 +46,7 @@ if (${BNN_NET_BENCHMARK}) add_compile_options("-DBNN_BENCHMARK") endif() -if (${BNN_BUILD_ANDROID}) +if (BNN_BUILD_MAIN_LIB) set(CMAKE_CXX_STANDARD 17) set(CMAKE_CXX_FLAGS_RELEASE "-O3 -DNDEBUG") @@ -64,7 +68,6 @@ if (${BNN_BUILD_ANDROID}) configure_benchmark() add_subdirectory(benchmark) endif() - else() set(CMAKE_CXX_STANDARD 11) diff --git a/cmake/system.cmake b/cmake/system.cmake index 2beb253..794c559 100644 --- a/cmake/system.cmake +++ b/cmake/system.cmake @@ -1,6 +1,7 @@ # Copyright 2019 JD.com Inc. JD AI -if (${CMAKE_SYSTEM_NAME} STREQUAL "Android") +if ((NOT CMAKE_SYSTEM_NAME STREQUAL CMAKE_HOST_SYSTEM_NAME) OR + (NOT CMAKE_SYSTEM_PROCESSOR STREQUAL CMAKE_HOST_SYSTEM_PROCESSOR)) set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER) set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY) set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY) diff --git a/dabnn/bconv.h b/dabnn/bconv.h index 3dd43c0..fad4800 100644 --- a/dabnn/bconv.h +++ b/dabnn/bconv.h @@ -7,11 +7,15 @@ #include #endif // __ARM_NEON +#if not defined (__aarch64__) +#include +#endif #include #include #include "mat.h" namespace bnn { +#ifdef __aarch64__ inline void bconv_1x1_64(const Mat &bottom_blob, const Mat &weight, Mat &top_blob); inline void bconv_1x1_128(const Mat &bottom_blob, const Mat &weight, @@ -20,8 +24,10 @@ inline void bconv_1x1_256(const Mat &bottom_blob, const Mat &weight, Mat &top_blob); inline void bconv_1x1_512(const Mat &bottom_blob, const Mat &weight, Mat &top_blob); +#endif inline void bconv_3x3(const Mat &bottom_blob, const Mat &weight, Mat &top_blob, const int stride = 1); +#ifdef __aarch64__ inline void bconv_3x3_64(const Mat &bottom_blob, const Mat &weight, Mat &top_blob, const int stride = 1); inline void bconv_3x3_64_fallback(const Mat &bottom_blob, const Mat &weight, @@ -44,8 +50,10 @@ inline void bconv_3x3_128_internal_s1(const uint64_t *bottom_ptr, const int b_w, inline void bconv_3x3_128_internal_fallback( const uint64_t *bottom_ptr, const int b_w, const uint64_t *weight_ptr, float *top_ptr, const int top_h, const int top_w, const int stride = 1); +#endif } // namespace bnn +#ifdef __aarch64__ inline void bnn::bconv_3x3_64(const Mat &bottom_blob, const Mat &weight, Mat &top_blob, const int stride) { bconv_3x3_64_opt4(bottom_blob, weight, top_blob, 0, stride); @@ -819,9 +827,11 @@ inline void unpack_output(float *b, float *a, int width, int height, #undef A } +#endif // __aarch64__ inline void bnn::bconv_3x3(const Mat &bottom_blob, const Mat &weight, Mat &top_blob, const int stride) { +#ifdef __aarch64__ // TODO: more elegant way static uint64_t packed_weight[999999]; static uint64_t packed_input[9999999]; @@ -884,8 +894,12 @@ inline void bnn::bconv_3x3(const Mat &bottom_blob, const Mat &weight, unpack_output(packed_output, static_cast(top_blob.data), top_blob.w, top_blob.h, top_blob.c); } +#else // __aarch64__ + baseline_bconv(bottom_blob, weight, 3, 3, 0, 0, stride, stride, 1, 1, top_blob.c, top_blob); +#endif // __aarch64__ } +#ifdef __aarch64__ inline void bnn::bconv_1x1_512(const Mat &bottom_blob, const Mat &weight, Mat &top_blob) { FORZS(th, top_blob.h, 2) { @@ -1673,5 +1687,6 @@ inline void bnn::bconv_1x1_64(const Mat &bottom_blob, const Mat &weight, } } } +#endif // __aarch64__ #endif diff --git a/dabnn/bgemm.h b/dabnn/bgemm.h index dc530b0..affb15e 100644 --- a/dabnn/bgemm.h +++ b/dabnn/bgemm.h @@ -16,6 +16,7 @@ #define min(i, j) ((i) < (j) ? (i) : (j)) +#if __aarch64__ inline void pack_a(const int kc, const uint64_t *a, const int lda, uint64_t *a_to); inline void pack_b(const int kc, const uint64_t *b, const int ldb, @@ -28,6 +29,7 @@ inline void inner_kernel(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, const int ldb, float *c, const int ldc, const int first_time); +#endif // __aarch64__ inline void bgemm_naive(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, const int ldb, float *c, const int ldc); @@ -35,6 +37,7 @@ inline void bgemm_naive(const int m, const int n, const int k, inline void bgemm(const int m, const int n, const int k, const uint64_t *a, int lda, const uint64_t *b, const int ldb, float *c, const int ldc) { +#if __aarch64__ int kc = 32; int mc = 32; int i, q, qb, ib; @@ -48,8 +51,12 @@ inline void bgemm(const int m, const int n, const int k, const uint64_t *a, i == 0); } } +#else + bgemm_naive(m, n, k, a, lda, b, ldb, c, ldc); +#endif // __aarch64__ } +#if __aarch64__ inline void inner_kernel(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, const int ldb, float *c, const int ldc, @@ -414,9 +421,11 @@ inline void micro_kernel(int64_t kc, float *c, const uint64_t *a, "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30"); } +#endif // __aarch64__ -inline void bgemm_naive(int m, int n, int k, uint64_t *a, int lda, uint64_t *b, - int ldb, float *c, int ldc) { +inline void bgemm_naive(const int m, const int n, const int k, + const uint64_t *a, const int lda, const uint64_t *b, + const int ldb, float *c, const int ldc) { FORZ(i, m) { FORZ(j, n) { FORZ(h, k) { diff --git a/dabnn/bitpack.h b/dabnn/bitpack.h index 8be37da..b90532c 100644 --- a/dabnn/bitpack.h +++ b/dabnn/bitpack.h @@ -16,6 +16,7 @@ #include #include "mat.h" +#ifdef __aarch64__ inline void pack_128_2(const float *float_ptr, void *binary_ptr, size_t size) { size_t nn_size = size >> 7; @@ -198,6 +199,7 @@ inline void pack_mat_128(const bnn::Mat &float_mat, bnn::Mat &binary_mat) { pack_128(static_cast(float_mat.data), binary_mat.data, float_mat.total()); } +#endif // __aarch64__ inline void pack_mat_64(const bnn::Mat &float_mat, bnn::Mat &binary_mat) { BNN_ASSERT( @@ -220,11 +222,15 @@ inline void pack_mat_64(const bnn::Mat &float_mat, bnn::Mat &binary_mat) { inline void pack_mat(const bnn::Mat &float_mat, bnn::Mat &binary_mat) { BNN_ASSERT(float_mat.c % 64 == 0, float_mat.c); +#ifdef __aarch64__ if (float_mat.c % 128 == 0) { pack_mat_128_2(float_mat, binary_mat); } else { pack_mat_64(float_mat, binary_mat); } +#else + pack_mat_64(float_mat, binary_mat); +#endif // __aarch64__ } #endif /* BITPACK_H */ diff --git a/dabnn/layers/AvePool.cpp b/dabnn/layers/AvePool.cpp index 3ef86a3..6d1395b 100644 --- a/dabnn/layers/AvePool.cpp +++ b/dabnn/layers/AvePool.cpp @@ -7,6 +7,7 @@ namespace bnn { +#ifdef __aarch64__ void ave_pool_2x2_s2(const bnn::Mat &input, bnn::Mat &output) { FORZ(h, output.h) { FORZ(w, output.w) { @@ -48,6 +49,7 @@ void ave_pool_2x2_s2(const bnn::Mat &input, bnn::Mat &output) { } } } +#endif // __aarch64__ void ave_pool_fallback(const bnn::Mat &input, const size_t pad_h, const size_t pad_w, const size_t stride_h, @@ -114,6 +116,7 @@ AvePool::AvePool(NetCP net, const std::string &name, css input, css output, } void AvePool::forward_impl() const { +#ifdef __aarch64__ if (stride_h == 2 && stride_w == 2 && kernel_h == 2 && kernel_w == 2 && input_mat->c % 4 == 0) { pad(*input_mat, pad_h, pad_w, *padded_mat); @@ -122,6 +125,10 @@ void AvePool::forward_impl() const { ave_pool_fallback(*input_mat, pad_h, pad_w, stride_h, stride_w, kernel_h, kernel_w, *output_mat); } +#else + ave_pool_fallback(*input_mat, pad_h, pad_w, stride_h, stride_w, + kernel_h, kernel_w, *output_mat); +#endif // __aarch64__ } } // namespace bnn diff --git a/dabnn/layers/BinConv.cpp b/dabnn/layers/BinConv.cpp index 79cdd8f..2c7b599 100644 --- a/dabnn/layers/BinConv.cpp +++ b/dabnn/layers/BinConv.cpp @@ -57,6 +57,7 @@ BinConv::BinConv(NetCP net, const std::string &name, css input, css weight, } bool BinConv::direct_conv_compatible() const { +#ifdef __aarch64__ if (weight_mat->h == 3 && weight_mat->w == 3 && input_mat->c == 1 && stride_h == stride_w) { return true; @@ -78,10 +79,17 @@ bool BinConv::direct_conv_compatible() const { return true; } return false; +#else + return false; +#endif } bool BinConv::gemm_compatible() const { +#ifdef __aarch64__ return weight_mat->h * weight_mat->n * weight_mat->c % 2 == 0; +#else + return false; +#endif } void BinConv::forward_impl() const { diff --git a/dabnn/layers/MaxPool.cpp b/dabnn/layers/MaxPool.cpp index fe2080d..7fd965a 100644 --- a/dabnn/layers/MaxPool.cpp +++ b/dabnn/layers/MaxPool.cpp @@ -9,6 +9,7 @@ namespace bnn { +#ifdef __aarch64__ void maxpool2x2(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, const int stride_w = 1) { FORZ(h, output.h) { @@ -126,6 +127,7 @@ void maxpool3x3(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, } } } +#endif // __aarch64__ MaxPool::MaxPool(NetCP net, const std::string &name, css input, css output, int kernel_h, int kernel_w, int pad_h, int pad_w, int stride_h, @@ -150,6 +152,7 @@ MaxPool::MaxPool(NetCP net, const std::string &name, css input, css output, padded_mat = mat_map[pad_name]; } void MaxPool::forward_impl() const { +#ifdef __aarch64__ // std::numeric_limits::min() is the closest value to 0, so we uses // -max() pad(*input_mat, pad_h, pad_w, *padded_mat, @@ -164,6 +167,9 @@ void MaxPool::forward_impl() const { } else { std::invalid_argument("Not supported max_pool"); } +#else + std::invalid_argument("Not supported max_pool"); +#endif // __aarch64__ } std::string MaxPool::to_str() const { diff --git a/dabnn/layers/Relu.cpp b/dabnn/layers/Relu.cpp index 37f0061..51ead33 100644 --- a/dabnn/layers/Relu.cpp +++ b/dabnn/layers/Relu.cpp @@ -8,6 +8,7 @@ namespace bnn { void Relu::forward_impl() const { +#if __ARM_NEON float32x4_t _zero = vdupq_n_f32(0.f); float *ptr = static_cast(*data_mat); FORZ(i, data_mat->total() / 4) { @@ -17,5 +18,11 @@ void Relu::forward_impl() const { ptr += 4; } +#else + float *ptr = static_cast(*data_mat); + FORZ(i, data_mat->total()) { + *ptr = std::max(*ptr, 0.f); + } +#endif // __ARM_NEON } } // namespace bnn diff --git a/dabnn/net.cpp b/dabnn/net.cpp index b2c4870..fcdb3a8 100644 --- a/dabnn/net.cpp +++ b/dabnn/net.cpp @@ -78,6 +78,7 @@ void Net::prepare() { shaper.AddShape(name, shape); +#ifdef __aarch64__ if (Shaper::c(shape) % 128 == 0) { // Re-arrange the bit order const auto len = shaper.total(shape); @@ -95,11 +96,14 @@ void Net::prepare() { bnn::DataType::Bit, false)); pack_mat_128_2(*tmp, *mat_map_[name]); } else { +#endif // __aarch64__ add_mat(name, std::make_shared( shape[0], shape[1], shape[2], shape[3], const_cast(data), bnn::DataType::Bit, false)); +#ifdef __aarch64__ } +#endif // __aarch64__ } else if (tensor->data_type() == flatbnn::DataType::Float32) { Shaper::Shape shape(tensor->shape()->begin(), tensor->shape()->end()); diff --git a/tests/bconv_test.cpp b/tests/bconv_test.cpp index d6e2bfe..b719255 100644 --- a/tests/bconv_test.cpp +++ b/tests/bconv_test.cpp @@ -190,7 +190,7 @@ TEST(bconv_test, bconv_test_3x3_64) { bnn::Mat c(CHEIGHT, CWIDTH, NUM_OUTPUT, bnn::DataType::Float); c.fill(0); - bnn::bconv_3x3_64(padded, b, c); + bnn::bconv_3x3(padded, b, c); bnn::Mat expected(CHEIGHT, CWIDTH, NUM_OUTPUT, bnn::DataType::Float); expected.fill(0); @@ -229,7 +229,7 @@ TEST(bconv_test, bconv_test_3x3_64_s2) { bnn::Mat c(CHEIGHT, CWIDTH, NUM_OUTPUT, bnn::DataType::Float); c.fill(0); - bnn::bconv_3x3_64(padded, b, c, 2); + bnn::bconv_3x3(padded, b, c, 2); bnn::Mat expected(CHEIGHT, CWIDTH, NUM_OUTPUT, bnn::DataType::Float); expected.fill(0); From 275a8555778f1ebd9c7f6249544c2d1a92f36295 Mon Sep 17 00:00:00 2001 From: daquexian Date: Tue, 28 May 2019 23:55:59 +0800 Subject: [PATCH 04/24] Remove unnecessary logs --- dabnn/mat.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/dabnn/mat.h b/dabnn/mat.h index c12fe80..d500212 100644 --- a/dabnn/mat.h +++ b/dabnn/mat.h @@ -273,8 +273,6 @@ inline bool Mat::operator==(const Mat &m) const { } FORZ(i, total()) { if (std::abs(static_cast(data)[i] - m[i]) > 1e-5) { - PNT(static_cast(data)[i]); - PNT(m[i]); return false; } } From b47929ab942778f270acde1134360661a6b3cdaa Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 00:22:35 +0800 Subject: [PATCH 05/24] Replace __builtin_popcountl in armv7, since long is 32-bit here --- .daq_pm/configs/bgemm_test_v7 | 7 +++++++ .daq_pm/configs/bgemm_test_x86 | 7 +++++++ common/baseline.h | 4 ++++ dabnn/bgemm.h | 9 +++++---- tests/bitpack_test.cpp | 14 ++++++++++++++ 5 files changed, 37 insertions(+), 4 deletions(-) create mode 100644 .daq_pm/configs/bgemm_test_v7 create mode 100644 .daq_pm/configs/bgemm_test_x86 diff --git a/.daq_pm/configs/bgemm_test_v7 b/.daq_pm/configs/bgemm_test_v7 new file mode 100644 index 0000000..15cca2c --- /dev/null +++ b/.daq_pm/configs/bgemm_test_v7 @@ -0,0 +1,7 @@ +# It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) +name binary-nn +type cpp +build_dir build_test_v7 +target bgemm_test +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=armeabi-v7a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja +binary ~/adb_push_and_run.sh tests/bgemm_test diff --git a/.daq_pm/configs/bgemm_test_x86 b/.daq_pm/configs/bgemm_test_x86 new file mode 100644 index 0000000..1ad0276 --- /dev/null +++ b/.daq_pm/configs/bgemm_test_x86 @@ -0,0 +1,7 @@ +# It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) +name binary-nn +type cpp +build_dir build_test_x86 +target bgemm_test +cmake_options -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DBNN_BUILD_MAIN_LIB=ON -GNinja +binary tests/bgemm_test diff --git a/common/baseline.h b/common/baseline.h index 397d3e1..9888089 100644 --- a/common/baseline.h +++ b/common/baseline.h @@ -10,8 +10,12 @@ #include inline int bitcount(uint64_t x) { +#ifdef __aarch64__ + return __builtin_popcountl(x); +#else std::bitset<64> bs(x); return bs.count(); +#endif } inline void baseline_pack_mat(const bnn::Mat &float_mat, bnn::Mat &binary_mat) { diff --git a/dabnn/bgemm.h b/dabnn/bgemm.h index affb15e..b17efe3 100644 --- a/dabnn/bgemm.h +++ b/dabnn/bgemm.h @@ -6,6 +6,7 @@ #if __ARM_NEON #include #endif // __ARM_NEON +#include #include #define P 8 @@ -86,7 +87,7 @@ inline void inner_kernel(const int m, const int n, const int k, FOR(_j, 0, j) { FOR(_i, i, m) { FORZ(_k, k) { - C(_i, _j) += __builtin_popcountl(A(_i, _k) ^ B(_k, _j)); + C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); } } } @@ -95,7 +96,7 @@ inline void inner_kernel(const int m, const int n, const int k, FOR(_j, j, n) { FOR(_i, 0, i) { FORZ(_k, k) { - C(_i, _j) += __builtin_popcountl(A(_i, _k) ^ B(_k, _j)); + C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); } } } @@ -104,7 +105,7 @@ inline void inner_kernel(const int m, const int n, const int k, FOR(_j, j, n) { FOR(_i, i, m) { FORZ(_k, k) { - C(_i, _j) += __builtin_popcountl(A(_i, _k) ^ B(_k, _j)); + C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); } } } @@ -430,7 +431,7 @@ inline void bgemm_naive(const int m, const int n, const int k, FORZ(j, n) { FORZ(h, k) { C(i, j) += static_cast( - __builtin_popcountl((A(i, h) ^ B(h, j)))); + bitcount((A(i, h) ^ B(h, j)))); } } } diff --git a/tests/bitpack_test.cpp b/tests/bitpack_test.cpp index 31e8cfc..67d3645 100644 --- a/tests/bitpack_test.cpp +++ b/tests/bitpack_test.cpp @@ -74,3 +74,17 @@ TEST(bitpack, pack_mat_fallback) { ASSERT_EQ(a_binary, expected); } + +TEST(bitpack, addv_v7) { + uint64_t data[2]; + fill_rand_uint64(data, 2); + uint8x16_t v = vld1q_u8(reinterpret_cast(data)); + auto v1 = vcntq_u8(v); + auto v2 = vpaddlq_u8(v1); + auto v3 = vpaddlq_u16(v2); + auto v4 = vpaddlq_u32(v3); + + auto res = vgetq_lane_u64(v4, 0) + vgetq_lane_u64(v4, 1); + + ASSERT_EQ(res, __builtin_popcountl(data[0]) + __builtin_popcountl(data[1])); +} From 71fccacd096c80e822f88a4e92be932f0149509e Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 02:14:05 +0800 Subject: [PATCH 06/24] Update some configurations --- .daq_pm/configs/bconv_test_x86 | 2 +- .daq_pm/configs/bgemm_test | 4 ++-- .daq_pm/configs/bitpack_test | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/.daq_pm/configs/bconv_test_x86 b/.daq_pm/configs/bconv_test_x86 index f8c6d11..360a39b 100644 --- a/.daq_pm/configs/bconv_test_x86 +++ b/.daq_pm/configs/bconv_test_x86 @@ -1,7 +1,7 @@ # It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) name binary-nn type cpp -build_dir build_bconv_test_x86 +build_dir build_test_x86 target bconv_test cmake_options -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DBNN_BUILD_MAIN_LIB=ON -GNinja binary tests/bconv_test diff --git a/.daq_pm/configs/bgemm_test b/.daq_pm/configs/bgemm_test index 73e84b4..c049daa 100644 --- a/.daq_pm/configs/bgemm_test +++ b/.daq_pm/configs/bgemm_test @@ -1,7 +1,7 @@ # It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) name binary-nn type cpp -build_dir build_bgemm_test +build_dir build_test target bgemm_test -cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja binary ~/adb_push_and_run.sh tests/bgemm_test diff --git a/.daq_pm/configs/bitpack_test b/.daq_pm/configs/bitpack_test index f4a4b43..5515f0b 100644 --- a/.daq_pm/configs/bitpack_test +++ b/.daq_pm/configs/bitpack_test @@ -1,7 +1,7 @@ # It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) name binary-nn type cpp -build_dir build +build_dir build_test target bitpack_test -cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja binary ~/adb_push_and_run.sh tests/bitpack_test From 670b2eca1283053bc2d3a18c32b7dcf358046411 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 02:14:40 +0800 Subject: [PATCH 07/24] Add armv7 implementation of bgemm, however, a armv7 device is needed to test it --- CMakeLists.txt | 3 +- dabnn/bgemm.h | 471 ++++++++++++++++++++++++++++++++++++++++++++++--- 2 files changed, 453 insertions(+), 21 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 3644bb0..a7558d3 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -24,7 +24,8 @@ option(BNN_USE_MSVC_STATIC_RUNTIME "Link onnx2bnn to msvc static runtime" ON) message(STATUS "Target architecture: ${CMAKE_SYSTEM_PROCESSOR}") if (NOT DEFINED BNN_BUILD_MAIN_LIB) - if (${CMAKE_SYSTEM_PROCESSOR} STREQUAL "aarch64") + if (CMAKE_SYSTEM_PROCESSOR STREQUAL "aarch64" OR + CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7-a") set(BNN_BUILD_MAIN_LIB ON) else() set(BNN_BUILD_MAIN_LIB OFF) diff --git a/dabnn/bgemm.h b/dabnn/bgemm.h index b17efe3..a02ff60 100644 --- a/dabnn/bgemm.h +++ b/dabnn/bgemm.h @@ -9,15 +9,23 @@ #include #include +#if __ARM_NEON +#ifdef __aarch64__ #define P 8 #define R 6 +#else +#define P 4 +#define R 4 +#endif // __aarch64__ +#endif // __ARM_NEON + #define A(i, j) a[(j)*lda + (i)] // A(y, x) #define B(i, j) b[(j)*ldb + (i)] // B(y, x) #define C(i, j) c[(j)*ldc + (i)] // C(y, x) #define min(i, j) ((i) < (j) ? (i) : (j)) -#if __aarch64__ +#ifdef __ARM_NEON inline void pack_a(const int kc, const uint64_t *a, const int lda, uint64_t *a_to); inline void pack_b(const int kc, const uint64_t *b, const int ldb, @@ -30,7 +38,7 @@ inline void inner_kernel(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, const int ldb, float *c, const int ldc, const int first_time); -#endif // __aarch64__ +#endif // __ARM_NEON inline void bgemm_naive(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, const int ldb, float *c, const int ldc); @@ -38,7 +46,7 @@ inline void bgemm_naive(const int m, const int n, const int k, inline void bgemm(const int m, const int n, const int k, const uint64_t *a, int lda, const uint64_t *b, const int ldb, float *c, const int ldc) { -#if __aarch64__ +#ifdef __ARM_NEON int kc = 32; int mc = 32; int i, q, qb, ib; @@ -54,10 +62,10 @@ inline void bgemm(const int m, const int n, const int k, const uint64_t *a, } #else bgemm_naive(m, n, k, a, lda, b, ldb, c, ldc); -#endif // __aarch64__ +#endif // __ARM_NEON } -#if __aarch64__ +#if __ARM_NEON inline void inner_kernel(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, const int ldb, float *c, const int ldc, @@ -86,27 +94,21 @@ inline void inner_kernel(const int m, const int n, const int k, if (i != m) { FOR(_j, 0, j) { FOR(_i, i, m) { - FORZ(_k, k) { - C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); - } + FORZ(_k, k) { C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); } } } } if (j != n) { FOR(_j, j, n) { FOR(_i, 0, i) { - FORZ(_k, k) { - C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); - } + FORZ(_k, k) { C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); } } } } if (i != m || j != n) { FOR(_j, j, n) { FOR(_i, i, m) { - FORZ(_k, k) { - C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); - } + FORZ(_k, k) { C(_i, _j) += bitcount(A(_i, _k) ^ B(_k, _j)); } } } } @@ -143,11 +145,13 @@ inline void unpack_c(const float *c_from, const int ldc, float *c, inline void micro_kernel(int64_t kc, float *c, const uint64_t *a, const uint64_t *b) { +#ifdef __aarch64__ // C: 8x6(float 32, 6x2=12regs), A: 8*K(8regs), B: K*6(6regs) // v0~v11 contains C, v12~v17 contains 6*128 of B, v18~v25 contains 128*8 of - // A v26~v30 store temporary values A is packed as 8*128 - // ----- - // 8*128 + // A v26~v30 store temporary values A is packed as + // 8*128 + // ----- + // 8*128 // B is packed as 128*6 | 128*6 asm volatile( "mov x0, %1 \n" @@ -421,8 +425,436 @@ inline void micro_kernel(int64_t kc, float *c, const uint64_t *a, "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30"); -} +#else // __aarch64__ + + // C: 4x4(float 32, 4x1=4), A: 4*K(4regs), B: K*4(4regs) + // q0~q3 contains C, q4~q7 contains 4*128 of B, q8~q11 contains 128*4 of A + // q12~q15 store temporary values + // + // A is packed as + // 4*128 + // ----- + // 4*128 + // B is packed as 128*4 | 128*4 + asm volatile( + "mov r0, %1 \n" + "vld1.8 {q0-q1}, [r0]! \n" + "vld1.8 {q2-q3}, [r0]! \n" + "0: \n" + "vld1.8 {q8-q9}, [%3]! \n" + "vld1.8 {q4-q5}, [%2]! \n" + "vld1.8 {q10-q11}, [%3]! \n" + "veor.u8 q12, q4, q8 \n" + "veor.u8 q13, q4, q9 \n" + "vcnt.u8 q12, q12 \n" + "vcnt.u8 q13, q13 \n" + "vld1.8 {q6-q7}, [%2]! \n" + "veor.u8 q14, q4, q10 \n" + "veor.u8 q15, q4, q11 \n" + "vcnt.u8 q14, q14 \n" + "vcnt.u8 q15, q15 \n" + "vpaddl.u8 q12, q12 \n" + "vpaddl.u8 q13, q13 \n" + "vpaddl.u8 q14, q14 \n" + "vpaddl.u8 q15, q15 \n" + "vpaddl.u16 q12, q12 \n" + "vpaddl.u16 q13, q13 \n" + "vpaddl.u16 q14, q14 \n" + "vpaddl.u16 q15, q15 \n" + "vpaddl.u32 q12, q12 \n" + "vpaddl.u32 q13, q13 \n" + "vpaddl.u32 q14, q14 \n" + "vpaddl.u32 q15, q15 \n" + "vadd.u32 d24, d24, d25 \n" + "vadd.u32 d26, d26, d27 \n" + "vadd.u32 d28, d28, d29 \n" + "vadd.u32 d30, d30, d31 \n" + "vzip.u32 q12, q14 \n" + "vzip.u32 q13, q15 \n" + "vzip.u32 q12, q13 \n" + "vadd.u32 q0, q0, q12 \n" + + "veor.u8 q12, q5, q8 \n" + "veor.u8 q13, q5, q9 \n" + "veor.u8 q14, q5, q10 \n" + "veor.u8 q15, q5, q11 \n" + "vcnt.u8 q12, q12 \n" + "vcnt.u8 q13, q13 \n" + "vcnt.u8 q14, q14 \n" + "vcnt.u8 q15, q15 \n" + "vpaddl.u8 q12, q12 \n" + "vpaddl.u8 q13, q13 \n" + "vpaddl.u8 q14, q14 \n" + "vpaddl.u8 q15, q15 \n" + "vpaddl.u16 q12, q12 \n" + "vpaddl.u16 q13, q13 \n" + "vpaddl.u16 q14, q14 \n" + "vpaddl.u16 q15, q15 \n" + "vpaddl.u32 q12, q12 \n" + "vpaddl.u32 q13, q13 \n" + "vpaddl.u32 q14, q14 \n" + "vpaddl.u32 q15, q15 \n" + "vadd.u32 d24, d24, d25 \n" + "vadd.u32 d26, d26, d27 \n" + "vadd.u32 d28, d28, d29 \n" + "vadd.u32 d30, d30, d31 \n" + "vzip.u32 q12, q14 \n" + "vzip.u32 q13, q15 \n" + "vzip.u32 q12, q13 \n" + "vadd.u32 q1, q1, q12 \n" + + "veor.u8 q12, q6, q8 \n" + "veor.u8 q13, q6, q9 \n" + "veor.u8 q14, q6, q10 \n" + "veor.u8 q15, q6, q11 \n" + "vcnt.u8 q12, q12 \n" + "vcnt.u8 q13, q13 \n" + "vcnt.u8 q14, q14 \n" + "vcnt.u8 q15, q15 \n" + "vpaddl.u8 q12, q12 \n" + "vpaddl.u8 q13, q13 \n" + "vpaddl.u8 q14, q14 \n" + "vpaddl.u8 q15, q15 \n" + "vpaddl.u16 q12, q12 \n" + "vpaddl.u16 q13, q13 \n" + "vpaddl.u16 q14, q14 \n" + "vpaddl.u16 q15, q15 \n" + "vpaddl.u32 q12, q12 \n" + "vpaddl.u32 q13, q13 \n" + "vpaddl.u32 q14, q14 \n" + "vpaddl.u32 q15, q15 \n" + "vadd.u32 d24, d24, d25 \n" + "vadd.u32 d26, d26, d27 \n" + "vadd.u32 d28, d28, d29 \n" + "vadd.u32 d30, d30, d31 \n" + "vzip.u32 q12, q14 \n" + "vzip.u32 q13, q15 \n" + "vzip.u32 q12, q13 \n" + "vadd.u32 q2, q2, q12 \n" + + "subs %0, %0, #1 \n" + + "veor.u8 q12, q7, q8 \n" + "veor.u8 q13, q7, q9 \n" + "veor.u8 q14, q7, q10 \n" + "veor.u8 q15, q7, q11 \n" + "vcnt.u8 q12, q12 \n" + "vcnt.u8 q13, q13 \n" + "vcnt.u8 q14, q14 \n" + "vcnt.u8 q15, q15 \n" + "vpaddl.u8 q12, q12 \n" + "vpaddl.u8 q13, q13 \n" + "vpaddl.u8 q14, q14 \n" + "vpaddl.u8 q15, q15 \n" + "vpaddl.u16 q12, q12 \n" + "vpaddl.u16 q13, q13 \n" + "vpaddl.u16 q14, q14 \n" + "vpaddl.u16 q15, q15 \n" + "vpaddl.u32 q12, q12 \n" + "vpaddl.u32 q13, q13 \n" + "vpaddl.u32 q14, q14 \n" + "vpaddl.u32 q15, q15 \n" + "vadd.u32 d24, d24, d25 \n" + "vadd.u32 d26, d26, d27 \n" + "vadd.u32 d28, d28, d29 \n" + "vadd.u32 d30, d30, d31 \n" + "vzip.u32 q12, q14 \n" + "vzip.u32 q13, q15 \n" + "vzip.u32 q12, q13 \n" + "vadd.u32 q3, q3, q12 \n" + "bne 0b \n" + + "vcvt.u32.f32 q0, q0 \n" + "vcvt.u32.f32 q1, q1 \n" + "vcvt.u32.f32 q2, q2 \n" + "vcvt.u32.f32 q3, q3 \n" + "vst1.32 q0, [%1]! \n" + "vst1.32 q1, [%1]! \n" + "vst1.32 q2, [%1]! \n" + "vst1.32 q3, [%1]! \n" + : "+r"(kc), // %0 + "+r"(c), // %1 + "+r"(b), // %2 + "+r"(a) // %3 + : + : "cc", "memory", "r0", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" + ); + /* + "ld1 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0], #64 \n" + "ld1 {v4.4s, v5.4s, v6.4s, v7.4s}, [x0], #64 \n" + "ld1 {v8.4s, v9.4s, v10.4s, v11.4s}, [x0] \n" + + "0: \n" + "ld1 {v18.2d, v19.2d, v20.2d, v21.2d}, [%3], #64 \n" + "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [%2], #64 \n" + "eor v26.16b, v12.16b, v18.16b \n" + "eor v27.16b, v12.16b, v19.16b \n" + "eor v28.16b, v12.16b, v20.16b \n" + "eor v29.16b, v12.16b, v21.16b \n" + "cnt v26.16b, v26.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "ld1 {v22.2d, v23.2d, v24.2d, v25.2d}, [%3], #64 \n" + "addv b26, v26.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "ins v26.s[1], v27.s[0] \n" + "ins v26.s[2], v28.s[0] \n" + "ins v26.s[3], v29.s[0] \n" + + "ld1 {v16.2d, v17.2d}, [%2], #32 \n" + "eor v27.16b, v12.16b, v22.16b \n" + "eor v28.16b, v12.16b, v23.16b \n" + "eor v29.16b, v12.16b, v24.16b \n" + "eor v30.16b, v12.16b, v25.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "cnt v30.16b, v30.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "addv b30, v30.16b \n" + "ins v27.s[1], v28.s[0] \n" + "ins v27.s[2], v29.s[0] \n" + "ins v27.s[3], v30.s[0] \n" + + "add v0.4s, v0.4s, v26.4s \n" // delay + "add v1.4s, v1.4s, v27.4s \n" + + // The No.1 col of C is finished + + "eor v26.16b, v13.16b, v18.16b \n" + "eor v27.16b, v13.16b, v19.16b \n" + "eor v28.16b, v13.16b, v20.16b \n" + "eor v29.16b, v13.16b, v21.16b \n" + "cnt v26.16b, v26.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "addv b26, v26.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "ins v26.s[1], v27.s[0] \n" + "ins v26.s[2], v28.s[0] \n" + "ins v26.s[3], v29.s[0] \n" + + "eor v27.16b, v13.16b, v22.16b \n" + "eor v28.16b, v13.16b, v23.16b \n" + "eor v29.16b, v13.16b, v24.16b \n" + "eor v30.16b, v13.16b, v25.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "cnt v30.16b, v30.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "addv b30, v30.16b \n" + "ins v27.s[1], v28.s[0] \n" + "ins v27.s[2], v29.s[0] \n" + "ins v27.s[3], v30.s[0] \n" + + "add v2.4s, v2.4s, v26.4s \n" // delay + "add v3.4s, v3.4s, v27.4s \n" + + // The No.2 col of C is finished + + "eor v26.16b, v14.16b, v18.16b \n" + "eor v27.16b, v14.16b, v19.16b \n" + "eor v28.16b, v14.16b, v20.16b \n" + "eor v29.16b, v14.16b, v21.16b \n" + "cnt v26.16b, v26.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "addv b26, v26.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "ins v26.s[1], v27.s[0] \n" + "ins v26.s[2], v28.s[0] \n" + "ins v26.s[3], v29.s[0] \n" + + "eor v27.16b, v14.16b, v22.16b \n" + "eor v28.16b, v14.16b, v23.16b \n" + "eor v29.16b, v14.16b, v24.16b \n" + "eor v30.16b, v14.16b, v25.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "cnt v30.16b, v30.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "addv b30, v30.16b \n" + "ins v27.s[1], v28.s[0] \n" + "ins v27.s[2], v29.s[0] \n" + "ins v27.s[3], v30.s[0] \n" + + "add v4.4s, v4.4s, v26.4s \n" // delay + "add v5.4s, v5.4s, v27.4s \n" + + // The No.3 col of C is finished + + "prfm pldl1keep, [%3, #128] \n" + "eor v26.16b, v15.16b, v18.16b \n" + "eor v27.16b, v15.16b, v19.16b \n" + "eor v28.16b, v15.16b, v20.16b \n" + "eor v29.16b, v15.16b, v21.16b \n" + "cnt v26.16b, v26.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "addv b26, v26.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "ins v26.s[1], v27.s[0] \n" + "ins v26.s[2], v28.s[0] \n" + "ins v26.s[3], v29.s[0] \n" + + "prfm pldl1keep, [%2, #128] \n" + "eor v27.16b, v15.16b, v22.16b \n" + "eor v28.16b, v15.16b, v23.16b \n" + "eor v29.16b, v15.16b, v24.16b \n" + "eor v30.16b, v15.16b, v25.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "cnt v30.16b, v30.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "addv b30, v30.16b \n" + "ins v27.s[1], v28.s[0] \n" + "ins v27.s[2], v29.s[0] \n" + "ins v27.s[3], v30.s[0] \n" + + "add v6.4s, v6.4s, v26.4s \n" // delay + "add v7.4s, v7.4s, v27.4s \n" + + // The No.4 col of C is finished + + "eor v26.16b, v16.16b, v18.16b \n" + "eor v27.16b, v16.16b, v19.16b \n" + "eor v28.16b, v16.16b, v20.16b \n" + "eor v29.16b, v16.16b, v21.16b \n" + "cnt v26.16b, v26.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "addv b26, v26.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "ins v26.s[1], v27.s[0] \n" + "ins v26.s[2], v28.s[0] \n" + "ins v26.s[3], v29.s[0] \n" + + "eor v27.16b, v16.16b, v22.16b \n" + "eor v28.16b, v16.16b, v23.16b \n" + "eor v29.16b, v16.16b, v24.16b \n" + "eor v30.16b, v16.16b, v25.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "cnt v30.16b, v30.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "addv b30, v30.16b \n" + "ins v27.s[1], v28.s[0] \n" + "ins v27.s[2], v29.s[0] \n" + "ins v27.s[3], v30.s[0] \n" + + "add v8.4s, v8.4s, v26.4s \n" // delay + "add v9.4s, v9.4s, v27.4s \n" + + // The No.5 col of C is finished + + "eor v26.16b, v17.16b, v18.16b \n" + "eor v27.16b, v17.16b, v19.16b \n" + "eor v28.16b, v17.16b, v20.16b \n" + "eor v29.16b, v17.16b, v21.16b \n" + "cnt v26.16b, v26.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "addv b26, v26.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "ins v26.s[1], v27.s[0] \n" + "ins v26.s[2], v28.s[0] \n" + "ins v26.s[3], v29.s[0] \n" + + "subs %0, %0, #1 \n" + + "eor v27.16b, v17.16b, v22.16b \n" + "eor v28.16b, v17.16b, v23.16b \n" + "eor v29.16b, v17.16b, v24.16b \n" + "eor v30.16b, v17.16b, v25.16b \n" + "cnt v27.16b, v27.16b \n" + "cnt v28.16b, v28.16b \n" + "cnt v29.16b, v29.16b \n" + "cnt v30.16b, v30.16b \n" + "addv b27, v27.16b \n" + "addv b28, v28.16b \n" + "addv b29, v29.16b \n" + "addv b30, v30.16b \n" + "ins v27.s[1], v28.s[0] \n" + "ins v27.s[2], v29.s[0] \n" + "ins v27.s[3], v30.s[0] \n" + + "add v10.4s, v10.4s, v26.4s \n" // delay + "add v11.4s, v11.4s, v27.4s \n" + + // The No.6 col of C is finished + + "bne 0b \n" + + "ucvtf v0.4s, v0.4s \n" + "ucvtf v1.4s, v1.4s \n" + "ucvtf v2.4s, v2.4s \n" + "ucvtf v3.4s, v3.4s \n" + "ucvtf v4.4s, v4.4s \n" + "ucvtf v5.4s, v5.4s \n" + "st1 {v0.4s}, [%1], #16 \n" + "ucvtf v6.4s, v6.4s \n" + "st1 {v1.4s}, [%1], #16 \n" + "ucvtf v7.4s, v7.4s \n" + "st1 {v2.4s}, [%1], #16 \n" + "ucvtf v8.4s, v8.4s \n" + "st1 {v3.4s}, [%1], #16 \n" + "ucvtf v9.4s, v9.4s \n" + "st1 {v4.4s}, [%1], #16 \n" + "ucvtf v10.4s, v10.4s \n" + "st1 {v5.4s}, [%1], #16 \n" + "ucvtf v11.4s, v11.4s \n" + "st1 {v6.4s}, [%1], #16 \n" + "st1 {v7.4s}, [%1], #16 \n" + "st1 {v8.4s}, [%1], #16 \n" + "st1 {v9.4s}, [%1], #16 \n" + "st1 {v10.4s}, [%1], #16 \n" + "st1 {v11.4s}, [%1], #16 \n" + : "+r"(kc), // %0 + "+r"(c), // %1 + "+r"(b), // %2 + "+r"(a) // %3 + : + : "cc", "memory", "x0", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", + "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", + "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", + "v28", "v29", "v30"); + */ + #endif // __aarch64__ +} +#endif // __ARM_NEON inline void bgemm_naive(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, @@ -430,8 +862,7 @@ inline void bgemm_naive(const int m, const int n, const int k, FORZ(i, m) { FORZ(j, n) { FORZ(h, k) { - C(i, j) += static_cast( - bitcount((A(i, h) ^ B(h, j)))); + C(i, j) += static_cast(bitcount((A(i, h) ^ B(h, j)))); } } } From 48cde006c61c0c830615ac69fd6c8070c29870bf Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 14:25:06 +0800 Subject: [PATCH 08/24] Fix bug of armv7 bgemm, add armv7 implemenation of maxpool and avepool (test not passed) --- .daq_pm/configs/bgemm_test_v7 | 2 +- .daq_pm/configs/net_test_v7 | 7 + dabnn/bgemm.h | 282 +--------------------------------- dabnn/layers/AvePool.cpp | 38 ++++- dabnn/layers/MaxPool.cpp | 84 +++++++++- 5 files changed, 127 insertions(+), 286 deletions(-) create mode 100644 .daq_pm/configs/net_test_v7 diff --git a/.daq_pm/configs/bgemm_test_v7 b/.daq_pm/configs/bgemm_test_v7 index 15cca2c..df044a9 100644 --- a/.daq_pm/configs/bgemm_test_v7 +++ b/.daq_pm/configs/bgemm_test_v7 @@ -3,5 +3,5 @@ name binary-nn type cpp build_dir build_test_v7 target bgemm_test -cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=armeabi-v7a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-25 -DANDROID_ABI=armeabi-v7a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja binary ~/adb_push_and_run.sh tests/bgemm_test diff --git a/.daq_pm/configs/net_test_v7 b/.daq_pm/configs/net_test_v7 new file mode 100644 index 0000000..08309e9 --- /dev/null +++ b/.daq_pm/configs/net_test_v7 @@ -0,0 +1,7 @@ +# It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) +name binary-nn +type cpp +build_dir build_test_v7 +target net_test +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-21 -DANDROID_ABI=armeabi-v7a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja +binary ~/adb_push_and_run.sh tests/net_test diff --git a/dabnn/bgemm.h b/dabnn/bgemm.h index a02ff60..0053d0d 100644 --- a/dabnn/bgemm.h +++ b/dabnn/bgemm.h @@ -562,12 +562,13 @@ inline void micro_kernel(int64_t kc, float *c, const uint64_t *a, "vzip.u32 q13, q15 \n" "vzip.u32 q12, q13 \n" "vadd.u32 q3, q3, q12 \n" + "bne 0b \n" - "vcvt.u32.f32 q0, q0 \n" - "vcvt.u32.f32 q1, q1 \n" - "vcvt.u32.f32 q2, q2 \n" - "vcvt.u32.f32 q3, q3 \n" + "vcvt.f32.u32 q0, q0 \n" + "vcvt.f32.u32 q1, q1 \n" + "vcvt.f32.u32 q2, q2 \n" + "vcvt.f32.u32 q3, q3 \n" "vst1.32 q0, [%1]! \n" "vst1.32 q1, [%1]! \n" "vst1.32 q2, [%1]! \n" @@ -579,279 +580,6 @@ inline void micro_kernel(int64_t kc, float *c, const uint64_t *a, : : "cc", "memory", "r0", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" ); - /* - "ld1 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0], #64 \n" - "ld1 {v4.4s, v5.4s, v6.4s, v7.4s}, [x0], #64 \n" - "ld1 {v8.4s, v9.4s, v10.4s, v11.4s}, [x0] \n" - - "0: \n" - "ld1 {v18.2d, v19.2d, v20.2d, v21.2d}, [%3], #64 \n" - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [%2], #64 \n" - "eor v26.16b, v12.16b, v18.16b \n" - "eor v27.16b, v12.16b, v19.16b \n" - "eor v28.16b, v12.16b, v20.16b \n" - "eor v29.16b, v12.16b, v21.16b \n" - "cnt v26.16b, v26.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "ld1 {v22.2d, v23.2d, v24.2d, v25.2d}, [%3], #64 \n" - "addv b26, v26.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "ins v26.s[1], v27.s[0] \n" - "ins v26.s[2], v28.s[0] \n" - "ins v26.s[3], v29.s[0] \n" - - "ld1 {v16.2d, v17.2d}, [%2], #32 \n" - "eor v27.16b, v12.16b, v22.16b \n" - "eor v28.16b, v12.16b, v23.16b \n" - "eor v29.16b, v12.16b, v24.16b \n" - "eor v30.16b, v12.16b, v25.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "cnt v30.16b, v30.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "addv b30, v30.16b \n" - "ins v27.s[1], v28.s[0] \n" - "ins v27.s[2], v29.s[0] \n" - "ins v27.s[3], v30.s[0] \n" - - "add v0.4s, v0.4s, v26.4s \n" // delay - "add v1.4s, v1.4s, v27.4s \n" - - // The No.1 col of C is finished - - "eor v26.16b, v13.16b, v18.16b \n" - "eor v27.16b, v13.16b, v19.16b \n" - "eor v28.16b, v13.16b, v20.16b \n" - "eor v29.16b, v13.16b, v21.16b \n" - "cnt v26.16b, v26.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "addv b26, v26.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "ins v26.s[1], v27.s[0] \n" - "ins v26.s[2], v28.s[0] \n" - "ins v26.s[3], v29.s[0] \n" - - "eor v27.16b, v13.16b, v22.16b \n" - "eor v28.16b, v13.16b, v23.16b \n" - "eor v29.16b, v13.16b, v24.16b \n" - "eor v30.16b, v13.16b, v25.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "cnt v30.16b, v30.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "addv b30, v30.16b \n" - "ins v27.s[1], v28.s[0] \n" - "ins v27.s[2], v29.s[0] \n" - "ins v27.s[3], v30.s[0] \n" - - "add v2.4s, v2.4s, v26.4s \n" // delay - "add v3.4s, v3.4s, v27.4s \n" - - // The No.2 col of C is finished - - "eor v26.16b, v14.16b, v18.16b \n" - "eor v27.16b, v14.16b, v19.16b \n" - "eor v28.16b, v14.16b, v20.16b \n" - "eor v29.16b, v14.16b, v21.16b \n" - "cnt v26.16b, v26.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "addv b26, v26.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "ins v26.s[1], v27.s[0] \n" - "ins v26.s[2], v28.s[0] \n" - "ins v26.s[3], v29.s[0] \n" - - "eor v27.16b, v14.16b, v22.16b \n" - "eor v28.16b, v14.16b, v23.16b \n" - "eor v29.16b, v14.16b, v24.16b \n" - "eor v30.16b, v14.16b, v25.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "cnt v30.16b, v30.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "addv b30, v30.16b \n" - "ins v27.s[1], v28.s[0] \n" - "ins v27.s[2], v29.s[0] \n" - "ins v27.s[3], v30.s[0] \n" - - "add v4.4s, v4.4s, v26.4s \n" // delay - "add v5.4s, v5.4s, v27.4s \n" - - // The No.3 col of C is finished - - "prfm pldl1keep, [%3, #128] \n" - "eor v26.16b, v15.16b, v18.16b \n" - "eor v27.16b, v15.16b, v19.16b \n" - "eor v28.16b, v15.16b, v20.16b \n" - "eor v29.16b, v15.16b, v21.16b \n" - "cnt v26.16b, v26.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "addv b26, v26.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "ins v26.s[1], v27.s[0] \n" - "ins v26.s[2], v28.s[0] \n" - "ins v26.s[3], v29.s[0] \n" - - "prfm pldl1keep, [%2, #128] \n" - "eor v27.16b, v15.16b, v22.16b \n" - "eor v28.16b, v15.16b, v23.16b \n" - "eor v29.16b, v15.16b, v24.16b \n" - "eor v30.16b, v15.16b, v25.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "cnt v30.16b, v30.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "addv b30, v30.16b \n" - "ins v27.s[1], v28.s[0] \n" - "ins v27.s[2], v29.s[0] \n" - "ins v27.s[3], v30.s[0] \n" - - "add v6.4s, v6.4s, v26.4s \n" // delay - "add v7.4s, v7.4s, v27.4s \n" - - // The No.4 col of C is finished - - "eor v26.16b, v16.16b, v18.16b \n" - "eor v27.16b, v16.16b, v19.16b \n" - "eor v28.16b, v16.16b, v20.16b \n" - "eor v29.16b, v16.16b, v21.16b \n" - "cnt v26.16b, v26.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "addv b26, v26.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "ins v26.s[1], v27.s[0] \n" - "ins v26.s[2], v28.s[0] \n" - "ins v26.s[3], v29.s[0] \n" - - "eor v27.16b, v16.16b, v22.16b \n" - "eor v28.16b, v16.16b, v23.16b \n" - "eor v29.16b, v16.16b, v24.16b \n" - "eor v30.16b, v16.16b, v25.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "cnt v30.16b, v30.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "addv b30, v30.16b \n" - "ins v27.s[1], v28.s[0] \n" - "ins v27.s[2], v29.s[0] \n" - "ins v27.s[3], v30.s[0] \n" - - "add v8.4s, v8.4s, v26.4s \n" // delay - "add v9.4s, v9.4s, v27.4s \n" - - // The No.5 col of C is finished - - "eor v26.16b, v17.16b, v18.16b \n" - "eor v27.16b, v17.16b, v19.16b \n" - "eor v28.16b, v17.16b, v20.16b \n" - "eor v29.16b, v17.16b, v21.16b \n" - "cnt v26.16b, v26.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "addv b26, v26.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "ins v26.s[1], v27.s[0] \n" - "ins v26.s[2], v28.s[0] \n" - "ins v26.s[3], v29.s[0] \n" - - "subs %0, %0, #1 \n" - - "eor v27.16b, v17.16b, v22.16b \n" - "eor v28.16b, v17.16b, v23.16b \n" - "eor v29.16b, v17.16b, v24.16b \n" - "eor v30.16b, v17.16b, v25.16b \n" - "cnt v27.16b, v27.16b \n" - "cnt v28.16b, v28.16b \n" - "cnt v29.16b, v29.16b \n" - "cnt v30.16b, v30.16b \n" - "addv b27, v27.16b \n" - "addv b28, v28.16b \n" - "addv b29, v29.16b \n" - "addv b30, v30.16b \n" - "ins v27.s[1], v28.s[0] \n" - "ins v27.s[2], v29.s[0] \n" - "ins v27.s[3], v30.s[0] \n" - - "add v10.4s, v10.4s, v26.4s \n" // delay - "add v11.4s, v11.4s, v27.4s \n" - - // The No.6 col of C is finished - - "bne 0b \n" - - "ucvtf v0.4s, v0.4s \n" - "ucvtf v1.4s, v1.4s \n" - "ucvtf v2.4s, v2.4s \n" - "ucvtf v3.4s, v3.4s \n" - "ucvtf v4.4s, v4.4s \n" - "ucvtf v5.4s, v5.4s \n" - "st1 {v0.4s}, [%1], #16 \n" - "ucvtf v6.4s, v6.4s \n" - "st1 {v1.4s}, [%1], #16 \n" - "ucvtf v7.4s, v7.4s \n" - "st1 {v2.4s}, [%1], #16 \n" - "ucvtf v8.4s, v8.4s \n" - "st1 {v3.4s}, [%1], #16 \n" - "ucvtf v9.4s, v9.4s \n" - "st1 {v4.4s}, [%1], #16 \n" - "ucvtf v10.4s, v10.4s \n" - "st1 {v5.4s}, [%1], #16 \n" - "ucvtf v11.4s, v11.4s \n" - "st1 {v6.4s}, [%1], #16 \n" - "st1 {v7.4s}, [%1], #16 \n" - "st1 {v8.4s}, [%1], #16 \n" - "st1 {v9.4s}, [%1], #16 \n" - "st1 {v10.4s}, [%1], #16 \n" - "st1 {v11.4s}, [%1], #16 \n" - : "+r"(kc), // %0 - "+r"(c), // %1 - "+r"(b), // %2 - "+r"(a) // %3 - : - : "cc", "memory", "x0", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", - "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", - "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", - "v28", "v29", "v30"); - */ - #endif // __aarch64__ } #endif // __ARM_NEON diff --git a/dabnn/layers/AvePool.cpp b/dabnn/layers/AvePool.cpp index 6d1395b..f8d2658 100644 --- a/dabnn/layers/AvePool.cpp +++ b/dabnn/layers/AvePool.cpp @@ -7,7 +7,7 @@ namespace bnn { -#ifdef __aarch64__ +#ifdef __ARM_NEON void ave_pool_2x2_s2(const bnn::Mat &input, bnn::Mat &output) { FORZ(h, output.h) { FORZ(w, output.w) { @@ -17,6 +17,7 @@ void ave_pool_2x2_s2(const bnn::Mat &input, bnn::Mat &output) { const float *ptr3 = input.point(h * 2 + 1, w * 2 + 1); float *output_ptr = output.point(h, w); size_t nn = input.c >> 2; +#ifdef __aarch64__ asm volatile( "fmov s30, #4.0 \n" "dup v30.4s, v30.s[0] \n" @@ -46,10 +47,39 @@ void ave_pool_2x2_s2(const bnn::Mat &input, bnn::Mat &output) { : : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v30"); +#else // __aarch64__ + asm volatile( + "vmov.f32 q13, #0.25 \n" + "0: \n" + "vld1.32 q0, [%0]! \n" + "pld [%0, #128] \n" + "vld1.32 q1, [%1]! \n" + "pld [%1, #128] \n" + "vld1.32 q2, [%2]! \n" + "pld [%2, #128] \n" + "vld1.32 q3, [%3]! \n" + "pld [%3, #128] \n" + "vadd.f32 q0, q0, q1 \n" + "vadd.f32 q2, q2, q3 \n" + "vadd.f32 q0, q0, q2 \n" + "vmul.f32 q0, q0, q13 \n" + "subs %5, %5, #1 \n" + "vst1.32 q0, [%4]! \n" + "bne 0b \n" + + : "+r"(ptr0), // %0 + "+r"(ptr1), // %1 + "+r"(ptr2), // %2 + "+r"(ptr3), // %3 + "+r"(output_ptr), // %4 + "+r"(nn) // %5 + : + : "cc", "memory", "q0", "q1", "q2", "q3", "q13"); +#endif // __aarch64__ } } } -#endif // __aarch64__ +#endif // __ARM_NEON void ave_pool_fallback(const bnn::Mat &input, const size_t pad_h, const size_t pad_w, const size_t stride_h, @@ -116,7 +146,7 @@ AvePool::AvePool(NetCP net, const std::string &name, css input, css output, } void AvePool::forward_impl() const { -#ifdef __aarch64__ +#ifdef __ARM_NEON if (stride_h == 2 && stride_w == 2 && kernel_h == 2 && kernel_w == 2 && input_mat->c % 4 == 0) { pad(*input_mat, pad_h, pad_w, *padded_mat); @@ -128,7 +158,7 @@ void AvePool::forward_impl() const { #else ave_pool_fallback(*input_mat, pad_h, pad_w, stride_h, stride_w, kernel_h, kernel_w, *output_mat); -#endif // __aarch64__ +#endif // __ARM_NEON } } // namespace bnn diff --git a/dabnn/layers/MaxPool.cpp b/dabnn/layers/MaxPool.cpp index 7fd965a..15202f2 100644 --- a/dabnn/layers/MaxPool.cpp +++ b/dabnn/layers/MaxPool.cpp @@ -9,7 +9,7 @@ namespace bnn { -#ifdef __aarch64__ +#ifdef __ARM_NEON void maxpool2x2(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, const int stride_w = 1) { FORZ(h, output.h) { @@ -24,6 +24,7 @@ void maxpool2x2(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, input.point(h * stride_h + 1, w * stride_w + 1); float *output_ptr = output.point(h, w); size_t nn = input.c >> 2; +#ifdef __aarch64__ asm volatile( "0: \n" "ld1 {v0.4s}, [%0], #16 \n" @@ -50,6 +51,33 @@ void maxpool2x2(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, : : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12"); +#else // __aarch64__ + asm volatile( + "0: \n" + "vld1.32 q0, [%0]! \n" + "pld [%0, #128] \n" + "vld1.32 q1, [%1]! \n" + "pld [%1, #128] \n" + "vld1.32 q2, [%2]! \n" + "pld [%2, #128] \n" + "vld1.32 q3, [%3]! \n" + "pld [%3, #128] \n" + "vmax.f32 q0, q0, q1 \n" + "vmax.f32 q2, q2, q3 \n" + "vmax.f32 q0, q2, q2 \n" + "subs %5, %5, #1 \n" + "vst1.32 q0, [%4]! \n" + "bne 0b \n" + + : "+r"(ptr0), // %0 + "+r"(ptr1), // %1 + "+r"(ptr2), // %2 + "+r"(ptr3), // %3 + "+r"(output_ptr), // %4 + "+r"(nn) // %5 + : + : "cc", "memory", "q0", "q1", "q2", "q3"); +#endif // __aarch64__ } } } @@ -78,6 +106,7 @@ void maxpool3x3(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, input.point(h * stride_h + 2, w * stride_w + 2); float *output_ptr = output.point(h, w); size_t nn = input.c >> 2; +#ifdef __aarch64__ asm volatile( "0: \n" "ld1 {v0.4s}, [%0], #16 \n" @@ -124,10 +153,57 @@ void maxpool3x3(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, : : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12"); +#else + asm volatile( + "0: \n" + "vld1.32 q0, [%0]! \n" + "pld [%0, #128] \n" + "vld1.32 q1, [%1]! \n" + "pld [%1, #128] \n" + "vld1.32 q2, [%2]! \n" + "pld [%2, #128] \n" + "vld1.32 q3, [%3]! \n" + "pld [%3, #128] \n" + "vmax.f32 q0, q0, q1 \n" + "vld1.32 q4, [%4]! \n" + "pld [%4, #128] \n" + "vmax.f32 q2, q2, q3 \n" + "vld1.32 q5, [%5]! \n" + "pld [%5, #128] \n" + "vld1.32 q6, [%6]! \n" + "pld [%6, #128] \n" + "vmax.f32 q4, q4, q5 \n" + "vld1.32 q7, [%7]! \n" + "pld [%7, #128] \n" + "vld1.32 q8, [%8]! \n" + "pld [%8, #128] \n" + "vmax.f32 q2, q2, q8 \n" + "vmax.f32 q6, q6, q7 \n" + "vmax.f32 q0, q0, q2 \n" + "subs %10, %10, #1 \n" + "vmax.f32 q4, q4, q6 \n" + "vmax.f32 q0, q0, q4 \n" + "vst1.32 q0, [%9]! \n" + "bne 0b \n" + + : "+r"(ptr0), // %0 + "+r"(ptr1), // %1 + "+r"(ptr2), // %2 + "+r"(ptr3), // %3 + "+r"(ptr4), // %4 + "+r"(ptr5), // %5 + "+r"(ptr6), // %6 + "+r"(ptr7), // %7 + "+r"(ptr8), // %8 + "+r"(output_ptr), // %9 + "+r"(nn) // %10 + : + : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8"); +#endif } } } -#endif // __aarch64__ +#endif // __ARM_NEON MaxPool::MaxPool(NetCP net, const std::string &name, css input, css output, int kernel_h, int kernel_w, int pad_h, int pad_w, int stride_h, @@ -152,7 +228,7 @@ MaxPool::MaxPool(NetCP net, const std::string &name, css input, css output, padded_mat = mat_map[pad_name]; } void MaxPool::forward_impl() const { -#ifdef __aarch64__ +#ifdef __ARM_NEON // std::numeric_limits::min() is the closest value to 0, so we uses // -max() pad(*input_mat, pad_h, pad_w, *padded_mat, @@ -169,7 +245,7 @@ void MaxPool::forward_impl() const { } #else std::invalid_argument("Not supported max_pool"); -#endif // __aarch64__ +#endif // __aarch64__ } std::string MaxPool::to_str() const { From 847cc2533091a344ed8e35554b9fc51691643e26 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 14:24:13 +0800 Subject: [PATCH 09/24] Fix configuration which doesn't enable neon --- .daq_pm/configs/bgemm_test_v7 | 2 +- .daq_pm/configs/net_test_v7 | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.daq_pm/configs/bgemm_test_v7 b/.daq_pm/configs/bgemm_test_v7 index df044a9..d8a6f3d 100644 --- a/.daq_pm/configs/bgemm_test_v7 +++ b/.daq_pm/configs/bgemm_test_v7 @@ -3,5 +3,5 @@ name binary-nn type cpp build_dir build_test_v7 target bgemm_test -cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-25 -DANDROID_ABI=armeabi-v7a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-25 -DANDROID_ABI="armeabi-v7a with NEON" -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja binary ~/adb_push_and_run.sh tests/bgemm_test diff --git a/.daq_pm/configs/net_test_v7 b/.daq_pm/configs/net_test_v7 index 08309e9..d2e3baf 100644 --- a/.daq_pm/configs/net_test_v7 +++ b/.daq_pm/configs/net_test_v7 @@ -3,5 +3,5 @@ name binary-nn type cpp build_dir build_test_v7 target net_test -cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-21 -DANDROID_ABI=armeabi-v7a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-21 -DANDROID_ABI="armeabi-v7a with NEON" -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja binary ~/adb_push_and_run.sh tests/net_test From 3294539867e2b5d0b42b09af45766a4252fac549 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 14:25:41 +0800 Subject: [PATCH 10/24] Fix maxpool that doesn't throw exception --- dabnn/layers/MaxPool.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/dabnn/layers/MaxPool.cpp b/dabnn/layers/MaxPool.cpp index 15202f2..997fbfc 100644 --- a/dabnn/layers/MaxPool.cpp +++ b/dabnn/layers/MaxPool.cpp @@ -241,10 +241,10 @@ void MaxPool::forward_impl() const { } else if (kernel_h == 2 && kernel_w == 2) { maxpool2x2(*padded_mat, *output_mat, stride_h, stride_w); } else { - std::invalid_argument("Not supported max_pool"); + throw std::invalid_argument("Not supported max_pool"); } #else - std::invalid_argument("Not supported max_pool"); + throw std::invalid_argument("Not supported max_pool"); #endif // __aarch64__ } From 1f47ce71050a48b4b9c18402bcc47e1378d74b27 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 14:34:20 +0800 Subject: [PATCH 11/24] Fix bug in armv7 maxpool 2x2 --- dabnn/layers/MaxPool.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dabnn/layers/MaxPool.cpp b/dabnn/layers/MaxPool.cpp index 997fbfc..2146374 100644 --- a/dabnn/layers/MaxPool.cpp +++ b/dabnn/layers/MaxPool.cpp @@ -64,7 +64,7 @@ void maxpool2x2(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, "pld [%3, #128] \n" "vmax.f32 q0, q0, q1 \n" "vmax.f32 q2, q2, q3 \n" - "vmax.f32 q0, q2, q2 \n" + "vmax.f32 q0, q0, q2 \n" "subs %5, %5, #1 \n" "vst1.32 q0, [%4]! \n" "bne 0b \n" From 5a4fc6ebcd3158a3f1a05cbc5d2d2819ac508713 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 14:34:32 +0800 Subject: [PATCH 12/24] Add max pool fallback --- dabnn/layers/MaxPool.cpp | 58 +++++++++++++++++++++++++++++++++------- 1 file changed, 49 insertions(+), 9 deletions(-) diff --git a/dabnn/layers/MaxPool.cpp b/dabnn/layers/MaxPool.cpp index 2146374..68079d4 100644 --- a/dabnn/layers/MaxPool.cpp +++ b/dabnn/layers/MaxPool.cpp @@ -205,6 +205,45 @@ void maxpool3x3(const bnn::Mat &input, bnn::Mat &output, const int stride_h = 1, } #endif // __ARM_NEON +void max_pool_fallback(const bnn::Mat &input, const size_t pad_h, + const size_t pad_w, const size_t stride_h, + const size_t stride_w, const size_t kernel_h, + const size_t kernel_w, bnn::Mat &output) { + const int output_h = + (input.h + 2 * pad_h - ((kernel_h - 1) + 1)) / stride_h + 1; + const int output_w = + (input.w + 2 * pad_w - ((kernel_w - 1) + 1)) / stride_w + 1; + + BNN_ASSERT(input.w * input.c * input.elemsize % 16 == 0, "Not align"); + BNN_ASSERT(output.w * output.c * output.elemsize % 16 == 0, "Not align"); + + int input_y = 0; + FORZ(output_y, output_h) { + int input_x = 0; + FORZ(output_x, output_w) { + FORZ(output_c, input.c) { + float m = -std::numeric_limits::max(); + FORZ(kh, kernel_h) { + int y = input_y - pad_h + kh; + const float *input_ptr = input.point(y, 0); + FORZ(kw, kernel_w) { + int x = input_x - pad_w + kw; + if (!(y < 0 || y >= input.h || x < 0 || x >= input.w)) { + const auto val = input_ptr[x * input.c + output_c]; + m = std::max(m, val); + } + } + } + + output[output_y * output_w * input.c + output_x * input.c + + output_c] = m; + } + input_x += stride_w; + } + input_y += stride_h; + } +} + MaxPool::MaxPool(NetCP net, const std::string &name, css input, css output, int kernel_h, int kernel_w, int pad_h, int pad_w, int stride_h, int stride_w) @@ -229,22 +268,23 @@ MaxPool::MaxPool(NetCP net, const std::string &name, css input, css output, } void MaxPool::forward_impl() const { #ifdef __ARM_NEON - // std::numeric_limits::min() is the closest value to 0, so we uses - // -max() - pad(*input_mat, pad_h, pad_w, *padded_mat, - -std::numeric_limits::max()); - BNN_ASSERT( - (kernel_h == 3 && kernel_w == 3) || (kernel_h == 2 && kernel_w == 2), - "Not supported max_pool"); if (kernel_h == 3 && kernel_w == 3) { + // std::numeric_limits::min() is the closest value to 0, so we uses + // -max() + pad(*input_mat, pad_h, pad_w, *padded_mat, + -std::numeric_limits::max()); maxpool3x3(*padded_mat, *output_mat, stride_h, stride_w); } else if (kernel_h == 2 && kernel_w == 2) { + pad(*input_mat, pad_h, pad_w, *padded_mat, + -std::numeric_limits::max()); maxpool2x2(*padded_mat, *output_mat, stride_h, stride_w); } else { - throw std::invalid_argument("Not supported max_pool"); + max_pool_fallback(*input_mat, pad_h, pad_w, stride_h, stride_w, + kernel_h, kernel_w, *output_mat); } #else - throw std::invalid_argument("Not supported max_pool"); + max_pool_fallback(*input_mat, pad_h, pad_w, stride_h, stride_w, + kernel_h, kernel_w, *output_mat); #endif // __aarch64__ } From 1dbc2cabdbbd885b20fd02727aec24c360586950 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 16:57:34 +0800 Subject: [PATCH 13/24] [daq_pm] Build net_test for android-21 instead of android-28 --- .daq_pm/configs/net_test | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.daq_pm/configs/net_test b/.daq_pm/configs/net_test index 31da42e..58ec92c 100644 --- a/.daq_pm/configs/net_test +++ b/.daq_pm/configs/net_test @@ -3,5 +3,5 @@ name binary-nn type cpp build_dir build_net_test target net_test -cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-28 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-21 -DANDROID_ABI=arm64-v8a -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja binary ~/adb_push_and_run.sh tests/net_test From 56a38479608934aa1e5f2580f684eb0c5e64ae85 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 16:58:30 +0800 Subject: [PATCH 14/24] fined im2col mat size --- dabnn/layers/BinConv.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/dabnn/layers/BinConv.cpp b/dabnn/layers/BinConv.cpp index 2c7b599..c8479d2 100644 --- a/dabnn/layers/BinConv.cpp +++ b/dabnn/layers/BinConv.cpp @@ -30,8 +30,9 @@ BinConv::BinConv(NetCP net, const std::string &name, css input, css weight, } const auto col_mat_name = "col_mat"; if (mat_map.find(col_mat_name) == mat_map.end()) { + const auto len = output_mat->h * output_mat->w * weight_mat->h * weight_mat->w * input_mat->elem_c; mat_map[col_mat_name] = - std::make_shared(999999, bnn::DataType::Bit); + std::make_shared(len, bnn::DataType::Bit); } padded_mat = mat(pad_name); From b68345bd6b2987de00b5c046f320f2871fcde934 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 16:58:50 +0800 Subject: [PATCH 15/24] Add the missing require_align=False for trans_weight_mat --- dabnn/layers/BinConv.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dabnn/layers/BinConv.cpp b/dabnn/layers/BinConv.cpp index c8479d2..1ffe8ab 100644 --- a/dabnn/layers/BinConv.cpp +++ b/dabnn/layers/BinConv.cpp @@ -46,7 +46,7 @@ BinConv::BinConv(NetCP net, const std::string &name, css input, css weight, const int k = weight_mat->h * weight_mat->w * weight_mat->c; transposed_weight_mat = std::make_shared(weight_mat->n, weight_mat->h, weight_mat->w, - weight_mat->elem_c, DataType::Bit); + weight_mat->elem_c, DataType::Bit, false); auto *trans_data_ptr = static_cast(transposed_weight_mat->data); auto *data_ptr = static_cast(weight_mat->data); From 5eda6d2ba2f0ae4f500f744fe3ac4b6542eb5650 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 16:59:10 +0800 Subject: [PATCH 16/24] Fix the wrong gemm_compatible() --- dabnn/layers/BinConv.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dabnn/layers/BinConv.cpp b/dabnn/layers/BinConv.cpp index 1ffe8ab..24b8054 100644 --- a/dabnn/layers/BinConv.cpp +++ b/dabnn/layers/BinConv.cpp @@ -87,7 +87,7 @@ bool BinConv::direct_conv_compatible() const { bool BinConv::gemm_compatible() const { #ifdef __aarch64__ - return weight_mat->h * weight_mat->n * weight_mat->c % 2 == 0; + return weight_mat->h * weight_mat->w * weight_mat->c % 2 == 0; #else return false; #endif From 0678418ca61fa073555f65446da54c1be8f9b717 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 16:59:52 +0800 Subject: [PATCH 17/24] Update operator== of Mat, add support for nan and Bit datatype --- dabnn/mat.h | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/dabnn/mat.h b/dabnn/mat.h index d500212..d31eaed 100644 --- a/dabnn/mat.h +++ b/dabnn/mat.h @@ -271,10 +271,32 @@ inline bool Mat::operator==(const Mat &m) const { h == m.h && c == m.c && data_type == m.data_type)) { return false; } - FORZ(i, total()) { - if (std::abs(static_cast(data)[i] - m[i]) > 1e-5) { - return false; + if (m.data_type == DataType::Float) { + FORZ(i, total()) { + const auto elem = static_cast(data)[i]; + if (std::isnan(elem) && !std::isnan(m[i])) { + PNT(elem, m[i]); + return false; + } + if (!std::isnan(elem) && std::isnan(m[i])) { + PNT(elem, m[i]); + return false; + } + if (std::abs(elem - m[i]) > 1e-5) { + PNT(i, elem, m[i]); + return false; + } } + } else if (m.data_type == DataType::Bit) { + FORZ(i, total()) { + const auto elem = static_cast(data)[i]; + if (elem != m[i]) { + PNT(elem, m[i]); + return false; + } + } + } else { + throw std::invalid_argument("Unknown datatype"); } return true; } From 85598444f9f029dace096a636662e02819fe16d1 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 17:00:23 +0800 Subject: [PATCH 18/24] Update error message for inner_kernel k%2==0 --- dabnn/bgemm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dabnn/bgemm.h b/dabnn/bgemm.h index 0053d0d..9563833 100644 --- a/dabnn/bgemm.h +++ b/dabnn/bgemm.h @@ -70,7 +70,7 @@ inline void inner_kernel(const int m, const int n, const int k, const uint64_t *a, const int lda, const uint64_t *b, const int ldb, float *c, const int ldc, const int first_time) { - BNN_ASSERT(k % 2 == 0, "k % 2 should be 0"); + BNN_ASSERT(k % 2 == 0, "k % 2 should be 0, k =", k); BNN_ASSERT(k * P < 128000, ""); BNN_ASSERT(k * R < 128000, ""); From 5af2ec3d93bb4198c06c5336307b5cc510e80a5b Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 17:00:40 +0800 Subject: [PATCH 19/24] Fix bug: output_mat is not inited in bgemm --- dabnn/layers/BinConv.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/dabnn/layers/BinConv.cpp b/dabnn/layers/BinConv.cpp index 24b8054..91ad541 100644 --- a/dabnn/layers/BinConv.cpp +++ b/dabnn/layers/BinConv.cpp @@ -99,6 +99,7 @@ void BinConv::forward_impl() const { pad(*input_mat, pad_h, pad_w, *padded_mat); bconv_3x3(*padded_mat, *weight_mat, *output_mat, stride_h); } else if (gemm_compatible()) { + output_mat->fill(0.f); bnn::im2col(*input_mat, weight_mat->h, weight_mat->w, pad_h, pad_w, stride_h, stride_w, 1, 1, *col_mat); const int m = weight_mat->n; From de3f85ff3f888a52ae49da365155bda2e24e0ca5 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 17:00:47 +0800 Subject: [PATCH 20/24] Enable bgemm for armv7 --- dabnn/layers/BinConv.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dabnn/layers/BinConv.cpp b/dabnn/layers/BinConv.cpp index 91ad541..e6bdf79 100644 --- a/dabnn/layers/BinConv.cpp +++ b/dabnn/layers/BinConv.cpp @@ -86,7 +86,7 @@ bool BinConv::direct_conv_compatible() const { } bool BinConv::gemm_compatible() const { -#ifdef __aarch64__ +#ifdef __ARM_NEON return weight_mat->h * weight_mat->w * weight_mat->c % 2 == 0; #else return false; From 94dab1850578382dbca7cc01bdba15defc9718d9 Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 18:18:07 +0800 Subject: [PATCH 21/24] Add armv7 test --- ci/build_dabnn_v7.sh | 11 +++++++ ci/dabnn_build_and_test.yml | 54 +++++++++++++++++++-------------- ci/start_android_emulator_v7.sh | 25 +++++++++++++++ ci/template_dabnn_run_test.yml | 9 ++++++ 4 files changed, 76 insertions(+), 23 deletions(-) create mode 100755 ci/build_dabnn_v7.sh create mode 100755 ci/start_android_emulator_v7.sh create mode 100644 ci/template_dabnn_run_test.yml diff --git a/ci/build_dabnn_v7.sh b/ci/build_dabnn_v7.sh new file mode 100755 index 0000000..6ee2ba5 --- /dev/null +++ b/ci/build_dabnn_v7.sh @@ -0,0 +1,11 @@ +#! /usr/bin/env bash +set -e + +echo "y" | $ANDROID_HOME/tools/bin/sdkmanager --install 'ndk-bundle' +nproc=$(ci/get_cores.sh) + +mkdir build_dabnn && cd build_dabnn +cmake -DCMAKE_TOOLCHAIN_FILE=$ANDROID_HOME/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-21 -DANDROID_ABI="armeabi-v7a with NEON" -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release .. +cmake --build . -- -j$nproc +cd - + diff --git a/ci/dabnn_build_and_test.yml b/ci/dabnn_build_and_test.yml index 94c9373..284805e 100644 --- a/ci/dabnn_build_and_test.yml +++ b/ci/dabnn_build_and_test.yml @@ -22,26 +22,34 @@ pr: - README.md - docs/* -pool: - vmImage: 'macOS-10.14' -steps: -- checkout: self - submodules: true -- bash: brew install watch gnu-sed - displayName: Install watch and gnu-sed -- bash: ci/build_dabnn.sh - displayName: Build -- bash: ci/start_android_emulator.sh - displayName: Start Android Emulator -- bash: ci/adb_push_and_run.sh build_dabnn/tests/bconv_test - displayName: Binary Conv Test -- bash: ci/adb_push_and_run.sh build_dabnn/tests/bgemm_test - displayName: Binary Gemm Test -- bash: ci/download_models.sh - displayName: Download Models -- bash: ci/adb_push_and_run.sh build_dabnn/tests/net_test - displayName: Model Test -- bash: ci/build_aar.sh - env: - BINTRAY_KEY: $(bintrayKey) - displayName: Build and Publish AAR package +jobs: +- job: aarch64 + pool: + vmImage: 'macOS-10.14' + steps: + - checkout: self + submodules: true + - bash: brew install watch gnu-sed + displayName: Install watch and gnu-sed + - bash: ci/build_dabnn.sh + displayName: Build + - bash: ci/start_android_emulator.sh + displayName: Start Android Emulator + - template: template_dabnn_run_test.yml + - bash: ci/build_aar.sh + env: + BINTRAY_KEY: $(bintrayKey) + displayName: Build and Publish AAR package +- job: armv7a_with_NEON + pool: + vmImage: 'macOS-10.14' + steps: + - checkout: self + submodules: true + - bash: brew install watch gnu-sed + displayName: Install watch and gnu-sed + - bash: ci/build_dabnn_v7.sh + displayName: Build + - bash: ci/start_android_emulator_v7.sh + displayName: Start Android Emulator + - template: template_dabnn_run_test.yml diff --git a/ci/start_android_emulator_v7.sh b/ci/start_android_emulator_v7.sh new file mode 100755 index 0000000..05e37e9 --- /dev/null +++ b/ci/start_android_emulator_v7.sh @@ -0,0 +1,25 @@ +#! /usr/bin/env bash +set -e + +export TERM=xterm + +echo "y" | $ANDROID_HOME/tools/bin/sdkmanager --install 'system-images;android-25;google_apis;armeabi-v7a' + +echo "no" | $ANDROID_HOME/tools/bin/avdmanager create avd -n android_emulator -k 'system-images;android-25;google_apis;armeabi-v7a' --force + +echo "Starting emulator" + +# Start emulator in background +nohup $ANDROID_HOME/emulator/emulator -avd android_emulator -no-snapshot -no-audio & + +# start server in advance, so that the result of watch will only change when device gets online +$ANDROID_HOME/platform-tools/adb start-server + +watch -g -n 1 '$ANDROID_HOME/platform-tools/adb devices | grep -c device$' + +echo "Emulator is online" + +$ANDROID_HOME/platform-tools/adb devices + +echo "Emulator started" + diff --git a/ci/template_dabnn_run_test.yml b/ci/template_dabnn_run_test.yml new file mode 100644 index 0000000..a8923d7 --- /dev/null +++ b/ci/template_dabnn_run_test.yml @@ -0,0 +1,9 @@ +steps: +- bash: ci/adb_push_and_run.sh build_dabnn/tests/bconv_test + displayName: Binary Conv Test +- bash: ci/adb_push_and_run.sh build_dabnn/tests/bgemm_test + displayName: Binary Gemm Test +- bash: ci/download_models.sh + displayName: Download Models +- bash: ci/adb_push_and_run.sh build_dabnn/tests/net_test + displayName: Model Test From 4751fa14bdb821be38af4cb2af5d449b4b9ae51e Mon Sep 17 00:00:00 2001 From: daquexian Date: Wed, 29 May 2019 19:48:06 +0800 Subject: [PATCH 22/24] Add guard in unsupported functions --- .daq_pm/configs/all_v7 | 5 +++++ benchmark/benchmark.cpp | 8 ++++++++ tests/bitpack_test.cpp | 4 ++++ 3 files changed, 17 insertions(+) create mode 100644 .daq_pm/configs/all_v7 diff --git a/.daq_pm/configs/all_v7 b/.daq_pm/configs/all_v7 new file mode 100644 index 0000000..46e05de --- /dev/null +++ b/.daq_pm/configs/all_v7 @@ -0,0 +1,5 @@ +# It is a configuration file for [project_manager.vim](https://github.com/daquexian/project_manager.vim) +name binary-nn +type cpp +build_dir build_v7 +cmake_options -DCMAKE_TOOLCHAIN_FILE=~/Android/Sdk/ndk-bundle/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=android-21 -DANDROID_ABI="armeabi-v7a with NEON" -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Release -GNinja diff --git a/benchmark/benchmark.cpp b/benchmark/benchmark.cpp index 9fcbfcc..be940c4 100644 --- a/benchmark/benchmark.cpp +++ b/benchmark/benchmark.cpp @@ -21,6 +21,7 @@ static void BM_pack_mat_64_small(benchmark::State &state) { } } +#ifdef __aarch64__ static void BM_pack_mat_128_small(benchmark::State &state) { const bnn::Mat a(1, 32, 32, 128, bnn::DataType::Float, 0); bnn::Mat b(1, 32, 32, 128, bnn::DataType::Bit, 0); @@ -28,6 +29,7 @@ static void BM_pack_mat_128_small(benchmark::State &state) { pack_mat_128(a, b); } } +#endif // __aarch64__ static void BM_pack_mat_64(benchmark::State &state) { const bnn::Mat a(1, 64, 64, 128, bnn::DataType::Float); @@ -37,6 +39,7 @@ static void BM_pack_mat_64(benchmark::State &state) { } } +#ifdef __aarch64__ static void BM_pack_mat_128(benchmark::State &state) { const bnn::Mat a(1, 64, 64, 128, bnn::DataType::Float); bnn::Mat b(1, 64, 64, 128, bnn::DataType::Bit); @@ -44,6 +47,7 @@ static void BM_pack_mat_128(benchmark::State &state) { pack_mat_128(a, b); } } +#endif // __aarch64__ #define SETUP_BCONV_FLOAT(size_a, size_b, num_output) \ const size_t AHEIGHT = size_a; \ @@ -73,6 +77,7 @@ static void BM_pack_mat_128(benchmark::State &state) { \ bnn::Mat c(CHEIGHT, CWIDTH, NUM_OUTPUT, bnn::DataType::Float); +#ifdef __aarch64__ static void BM_bconv_float_3x3_128(benchmark::State &state) { SETUP_BCONV_FLOAT(30, 3, 128); for (auto _ : state) { @@ -88,6 +93,7 @@ static void BM_bconv_float_1x1_128(benchmark::State &state) { bnn::bconv_1x1_128(a_binary, b, c); } } +#endif // __aarch64__ #undef SETUP_BCONV_FLOAT @@ -135,6 +141,7 @@ static void BM_bnn_bconv_1x1_naive_128(benchmark::State &state) { } } +#ifdef __aarch64__ static void BM_bnn_bconv_1x1_64(benchmark::State &state) { SETUP_BCONV(56, 1, 64, 1); for (auto _ : state) { @@ -162,6 +169,7 @@ static void BM_bnn_bconv_1x1_512(benchmark::State &state) { bnn::bconv_1x1_512(a, b, c); } } +#endif // __aarch64__ static void BM_bnn_bconv_3x3_64(benchmark::State &state) { SETUP_BCONV(58, 3, 64, 1); diff --git a/tests/bitpack_test.cpp b/tests/bitpack_test.cpp index 67d3645..dd7c97f 100644 --- a/tests/bitpack_test.cpp +++ b/tests/bitpack_test.cpp @@ -9,6 +9,7 @@ #include #include +#ifdef __aarch64__ TEST(bitpack, pack_mat_128) { const size_t AHEIGHT = 64; const size_t AWIDTH = 64; @@ -32,6 +33,7 @@ TEST(bitpack, pack_mat_128) { bitcount(*(static_cast(expected) + i + 1))); } } +#endif // __aarch64__ TEST(bitpack, pack_mat_64) { const size_t AHEIGHT = 64; @@ -57,6 +59,7 @@ TEST(bitpack, pack_mat_64) { } } +#ifdef __aarch64__ TEST(bitpack, pack_mat_fallback) { const size_t AHEIGHT = 64; const size_t AWIDTH = 64; @@ -74,6 +77,7 @@ TEST(bitpack, pack_mat_fallback) { ASSERT_EQ(a_binary, expected); } +#endif // __aarch64__ TEST(bitpack, addv_v7) { uint64_t data[2]; From e1a6de3bc21acbe2c9e306678999b358a1b85fdf Mon Sep 17 00:00:00 2001 From: daquexian Date: Sat, 1 Jun 2019 19:00:37 +0800 Subject: [PATCH 23/24] Update README.md --- README.md | 4 ++-- README_CN.md | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/README.md b/README.md index cf99a1a..e099b1a 100644 --- a/README.md +++ b/README.md @@ -16,7 +16,7 @@ Join chat at [Gitter (English)](https://gitter.im/dabnn/dabnn) or QQ Group (Chin Binary neural networks (BNNs) have great potential on edge devices since they replace float operations by efficient bit-wise operations. However, to leverage the efficiency of bit-wise operations, the reimplmentation of convolution layer and also other layers is needed. -To our best knowledge, dabnn is the first highly-optimized binary neural networks inference framework for mobile platform. We implemented binary convolutions with armv8 assembly. On Google Pixel 1, our dabnn is as **800%~2400% faster** as [BMXNet](https://github.com/hpi-xnor/BMXNet) (the only one open-sourced BNN inference framework except dabnn to our best knowledge) on a single binary convolution, and as about **700% faster** as it on binarized ResNet-18. +To our best knowledge, dabnn is the first highly-optimized binary neural networks inference framework for mobile platform. We implemented binary convolutions with ARM assembly. On Google Pixel 1, our dabnn is as **800%~2400% faster** as [BMXNet](https://github.com/hpi-xnor/BMXNet) (the only one open-sourced BNN inference framework except dabnn to our best knowledge) on a single binary convolution, and as about **700% faster** as it on binarized ResNet-18. ## Benchmark and Comparison @@ -50,7 +50,7 @@ We provide a conversion tool, named onnx2bnn, to convert an ONNX model to a dabn Note: Binary convolution is a custom operator, so whether the ONNX model is dabnn-comptabile heavily depends on the implementation of the binary convolution in the training code. Please check out [our wiki](https://github.com/JDAI-CV/dabnn/wiki/Train,-export-and-convert-a-dabnn-model) for the further information. -After conversion, the generated dabnn model can be deployed on armv8 devices. For Android developer, we have provided Android AAR package and published it on [jcenter](https://bintray.com/daquexian566/maven/dabnn/_latestVersion), for the usage please check out [example project](https://github.com/JDAI-CV/dabnn-example). +After conversion, the generated dabnn model can be deployed on ARM devices (e.g., mobile phones and embedded devices). For Android developer, we have provided Android AAR package and published it on [jcenter](https://bintray.com/daquexian566/maven/dabnn/_latestVersion), for the usage please check out [example project](https://github.com/JDAI-CV/dabnn-example). ## Pretrained Models diff --git a/README_CN.md b/README_CN.md index b93dca6..7a31187 100644 --- a/README_CN.md +++ b/README_CN.md @@ -18,7 +18,7 @@ QQ 群：1021964010, 入群答案: nndab 然而，想发挥出位运算的高效率，就需要用位运算对卷积进行重新实现。一直以来，始终没有人针对二值网络推出一个高度优化的 inference 框架，这让二值网络令人遗憾的失去了可以部署在现有通用设备上这个巨大的优势。 -为了填补这个巨大的空白，我们推出了 dabnn，一个用 armv8 汇编重写了卷积，高度优化的二值网络 inference 框架。实验显示 dabnn 相对于现有的二值网络和浮点网络 inference 框架均能带来极大的加速。在运行单个二值卷积时，我们的速度是 [BMXNet](https://github.com/hpi-xnor/BMXNet) （除 dabnn 外唯一一个二值网络 inference 框架） 的 **800%~2400%**，在运行二值化的 ResNet-18 时，我们的速度是 BMXNet 的约 **700%**。我们希望 dabnn 的开源可以成为二值网络部署在终端设备的关键一步，也可以有助于使这一领域的爱好者了解二值网络在真实设备上的表现。 +为了填补这个巨大的空白，我们推出了 dabnn，一个用 ARM 汇编重写了卷积，高度优化的二值网络 inference 框架。实验显示 dabnn 相对于现有的二值网络和浮点网络 inference 框架均能带来极大的加速。在运行单个二值卷积时，我们的速度是 [BMXNet](https://github.com/hpi-xnor/BMXNet) （除 dabnn 外唯一一个二值网络 inference 框架） 的 **800%~2400%**，在运行二值化的 ResNet-18 时，我们的速度是 BMXNet 的约 **700%**。我们希望 dabnn 的开源可以成为二值网络部署在终端设备的关键一步，也可以有助于使这一领域的爱好者了解二值网络在真实设备上的表现。 ## 速度 @@ -52,7 +52,7 @@ dabnn_bireal18_imagenet_stem 43279353 ns 41533009 ns 14 <--- 注意：因为二值卷积是一种自定义操作，所以 ONNX 模型是否与 dabnn 兼容极大程度上依赖于训练代码中二值卷积的实现，在 [wiki](https://github.com/JDAI-CV/dabnn/wiki/Train,-export-and-convert-a-dabnn-model) 中有详细的进一步描述。 -转换完成后得到的 dabnn 模型就可以在 armv8 设备上使用。对 Android 开发者我们已经把 Android AAR 包上传到了 [jcenter](https://bintray.com/daquexian566/maven/dabnn/_latestVersion)，使用方法请看[示例工程](https://github.com/JDAI-CV/dabnn-example)。 +转换完成后得到的 dabnn 模型就可以在 ARM 设备（例如手机和嵌入式设备）上使用。对 Android 开发者我们已经把 Android AAR 包上传到了 [jcenter](https://bintray.com/daquexian566/maven/dabnn/_latestVersion)，使用方法请看[示例工程](https://github.com/JDAI-CV/dabnn-example)。 ## 预训练模型 From 463c1e43fe9b2399942f8fe393684aad5e34fd97 Mon Sep 17 00:00:00 2001 From: daquexian Date: Sat, 1 Jun 2019 19:14:06 +0800 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