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bigtreetechMsq001
authored andcommittedJun 15, 2022
✨ BigTreeTech SKR3 - STM32H743 (MarlinFirmware#24271)
Co-authored-by: Alan.Ma <alansayyeah@gmail.com>
1 parent f31d477 commit 655b606

13 files changed

+2243
-215
lines changed
 

‎Marlin/src/HAL/STM32/sdio.cpp

+162-215
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‎Marlin/src/core/boards.h

+2
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@@ -429,6 +429,8 @@
429429
#define BOARD_T41U5XBB 5002 // T41U5XBB Teensy 4.1 breakout board
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#define BOARD_NUCLEO_F767ZI 5003 // ST NUCLEO-F767ZI Dev Board
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#define BOARD_BTT_SKR_SE_BX 5004 // BigTreeTech SKR SE BX (STM32H743II)
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#define BOARD_BTT_SKR_V3_0 5005 // BigTreeTech SKR V3.0 (STM32H743VG)
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#define BOARD_BTT_SKR_V3_0_EZ 5006 // BigTreeTech SKR V3.0 EZ (STM32H743VG)
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433435
//
434436
// Espressif ESP32 WiFi

‎Marlin/src/pins/pins.h

+4
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@@ -708,6 +708,10 @@
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#include "stm32f7/pins_NUCLEO_F767ZI.h" // STM32F7 env:NUCLEO_F767ZI
709709
#elif MB(BTT_SKR_SE_BX)
710710
#include "stm32h7/pins_BTT_SKR_SE_BX.h" // STM32H7 env:BTT_SKR_SE_BX
711+
#elif MB(BTT_SKR_V3_0)
712+
#include "stm32h7/pins_BTT_SKR_V3_0.h" // STM32H7 env:STM32H743Vx_btt
713+
#elif MB(BTT_SKR_V3_0_EZ)
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#include "stm32h7/pins_BTT_SKR_V3_0_EZ.h" // STM32H7 env:STM32H743Vx_btt
711715
#elif MB(TEENSY41)
712716
#include "teensy4/pins_TEENSY41.h" // Teensy-4.x env:teensy41
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#elif MB(T41U5XBB)
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/**
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* Marlin 3D Printer Firmware
3+
* Copyright (c) 2022 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
4+
*
5+
* Based on Sprinter and grbl.
6+
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
9+
* it under the terms of the GNU General Public License as published by
10+
* the Free Software Foundation, either version 3 of the License, or
11+
* (at your option) any later version.
12+
*
13+
* This program is distributed in the hope that it will be useful,
14+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16+
* GNU General Public License for more details.
17+
*
18+
* You should have received a copy of the GNU General Public License
19+
* along with this program. If not, see <https://www.gnu.org/licenses/>.
20+
*
21+
*/
22+
#pragma once
23+
24+
#define BOARD_INFO_NAME "BTT SKR V3"
25+
26+
#include "pins_BTT_SKR_V3_0_common.h"
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/**
2+
* Marlin 3D Printer Firmware
3+
* Copyright (c) 2022 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
4+
*
5+
* Based on Sprinter and grbl.
6+
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
7+
*
8+
* This program is free software: you can redistribute it and/or modify
9+
* it under the terms of the GNU General Public License as published by
10+
* the Free Software Foundation, either version 3 of the License, or
11+
* (at your option) any later version.
12+
*
13+
* This program is distributed in the hope that it will be useful,
14+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16+
* GNU General Public License for more details.
17+
*
18+
* You should have received a copy of the GNU General Public License
19+
* along with this program. If not, see <https://www.gnu.org/licenses/>.
20+
*
21+
*/
22+
#pragma once
23+
24+
#define BOARD_INFO_NAME "BTT SKR V3 EZ"
25+
26+
#include "pins_BTT_SKR_V3_0_common.h"

‎Marlin/src/pins/stm32h7/pins_BTT_SKR_V3_0_common.h

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{
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"build": {
3+
"core": "stm32",
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"cpu": "cortex-m7",
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"extra_flags": "-DSTM32H7xx -DSTM32H743xx",
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"f_cpu": "400000000L",
7+
"mcu": "stm32h743vit6",
8+
"product_line": "STM32H743xx",
9+
"variant": "MARLIN_H743Vx"
10+
},
11+
"connectivity": [
12+
"can",
13+
"ethernet"
14+
],
15+
"debug": {
16+
"jlink_device": "STM32H743VI",
17+
"openocd_target": "stm32h7x",
18+
"svd_path": "STM32H7x3.svd",
19+
"tools": {
20+
"stlink": {
21+
"server": {
22+
"arguments": [
23+
"-f",
24+
"scripts/interface/stlink.cfg",
25+
"-c",
26+
"transport select hla_swd",
27+
"-f",
28+
"scripts/target/stm32h7x.cfg",
29+
"-c",
30+
"reset_config none"
31+
],
32+
"executable": "bin/openocd",
33+
"package": "tool-openocd"
34+
}
35+
}
36+
}
37+
},
38+
"frameworks": [
39+
"arduino",
40+
"stm32cube"
41+
],
42+
"name": "STM32H743VI (1024k RAM. 2048k Flash)",
43+
"upload": {
44+
"disable_flushing": false,
45+
"maximum_ram_size": 1048576,
46+
"maximum_size": 2097152,
47+
"protocol": "stlink",
48+
"protocols": [
49+
"stlink",
50+
"dfu",
51+
"jlink",
52+
"cmsis-dap"
53+
],
54+
"offset_address": "0x8020000",
55+
"require_upload_port": true,
56+
"use_1200bps_touch": false,
57+
"wait_for_upload_port": false
58+
},
59+
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h743vi.html",
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"vendor": "ST"
61+
}

‎buildroot/share/PlatformIO/variants/MARLIN_H743Vx/PeripheralPins.c

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/* Dual pad pin name */
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PC_2_C = PC_2 | PDUAL,
3+
PC_3_C = PC_3 | PDUAL,
4+
5+
/* Alternate pin name */
6+
PA_0_ALT1 = PA_0 | ALT1,
7+
PA_1_ALT1 = PA_1 | ALT1,
8+
PA_1_ALT2 = PA_1 | ALT2,
9+
PA_2_ALT1 = PA_2 | ALT1,
10+
PA_2_ALT2 = PA_2 | ALT2,
11+
PA_3_ALT1 = PA_3 | ALT1,
12+
PA_3_ALT2 = PA_3 | ALT2,
13+
PA_4_ALT1 = PA_4 | ALT1,
14+
PA_4_ALT2 = PA_4 | ALT2,
15+
PA_5_ALT1 = PA_5 | ALT1,
16+
PA_6_ALT1 = PA_6 | ALT1,
17+
PA_7_ALT1 = PA_7 | ALT1,
18+
PA_7_ALT2 = PA_7 | ALT2,
19+
PA_7_ALT3 = PA_7 | ALT3,
20+
PA_9_ALT1 = PA_9 | ALT1,
21+
PA_10_ALT1 = PA_10 | ALT1,
22+
PA_11_ALT1 = PA_11 | ALT1,
23+
PA_12_ALT1 = PA_12 | ALT1,
24+
PA_15_ALT1 = PA_15 | ALT1,
25+
PA_15_ALT2 = PA_15 | ALT2,
26+
PB_0_ALT1 = PB_0 | ALT1,
27+
PB_0_ALT2 = PB_0 | ALT2,
28+
PB_1_ALT1 = PB_1 | ALT1,
29+
PB_1_ALT2 = PB_1 | ALT2,
30+
PB_3_ALT1 = PB_3 | ALT1,
31+
PB_3_ALT2 = PB_3 | ALT2,
32+
PB_4_ALT1 = PB_4 | ALT1,
33+
PB_4_ALT2 = PB_4 | ALT2,
34+
PB_5_ALT1 = PB_5 | ALT1,
35+
PB_5_ALT2 = PB_5 | ALT2,
36+
PB_6_ALT1 = PB_6 | ALT1,
37+
PB_6_ALT2 = PB_6 | ALT2,
38+
PB_7_ALT1 = PB_7 | ALT1,
39+
PB_8_ALT1 = PB_8 | ALT1,
40+
PB_8_ALT2 = PB_8 | ALT2,
41+
PB_9_ALT1 = PB_9 | ALT1,
42+
PB_9_ALT2 = PB_9 | ALT2,
43+
PB_14_ALT1 = PB_14 | ALT1,
44+
PB_14_ALT2 = PB_14 | ALT2,
45+
PB_15_ALT1 = PB_15 | ALT1,
46+
PB_15_ALT2 = PB_15 | ALT2,
47+
PC_0_ALT1 = PC_0 | ALT1,
48+
PC_0_ALT2 = PC_0 | ALT2,
49+
PC_1_ALT1 = PC_1 | ALT1,
50+
PC_1_ALT2 = PC_1 | ALT2,
51+
PC_4_ALT1 = PC_4 | ALT1,
52+
PC_5_ALT1 = PC_5 | ALT1,
53+
PC_6_ALT1 = PC_6 | ALT1,
54+
PC_6_ALT2 = PC_6 | ALT2,
55+
PC_7_ALT1 = PC_7 | ALT1,
56+
PC_7_ALT2 = PC_7 | ALT2,
57+
PC_8_ALT1 = PC_8 | ALT1,
58+
PC_9_ALT1 = PC_9 | ALT1,
59+
PC_10_ALT1 = PC_10 | ALT1,
60+
PC_11_ALT1 = PC_11 | ALT1,
61+
62+
/* SYS_WKUP */
63+
#ifdef PWR_WAKEUP_PIN1
64+
SYS_WKUP1 = PA_0, /* SYS_WKUP0 */
65+
#endif
66+
#ifdef PWR_WAKEUP_PIN2
67+
SYS_WKUP2 = PA_2, /* SYS_WKUP1 */
68+
#endif
69+
#ifdef PWR_WAKEUP_PIN3
70+
SYS_WKUP3 = PC_13, /* SYS_WKUP2 */
71+
#endif
72+
#ifdef PWR_WAKEUP_PIN4
73+
SYS_WKUP4 = NC,
74+
#endif
75+
#ifdef PWR_WAKEUP_PIN5
76+
SYS_WKUP5 = NC,
77+
#endif
78+
#ifdef PWR_WAKEUP_PIN6
79+
SYS_WKUP6 = PC_1, /* SYS_WKUP5 */
80+
#endif
81+
#ifdef PWR_WAKEUP_PIN7
82+
SYS_WKUP7 = NC,
83+
#endif
84+
#ifdef PWR_WAKEUP_PIN8
85+
SYS_WKUP8 = NC,
86+
#endif
87+
88+
/* USB */
89+
#ifdef USBCON
90+
USB_OTG_FS_DM = PA_11,
91+
USB_OTG_FS_DP = PA_12,
92+
USB_OTG_FS_ID = PA_10,
93+
USB_OTG_FS_SOF = PA_8,
94+
USB_OTG_FS_VBUS = PA_9,
95+
USB_OTG_HS_DM = PB_14,
96+
USB_OTG_HS_DP = PB_15,
97+
USB_OTG_HS_ID = PB_12,
98+
USB_OTG_HS_SOF = PA_4,
99+
USB_OTG_HS_ULPI_CK = PA_5,
100+
USB_OTG_HS_ULPI_D0 = PA_3,
101+
USB_OTG_HS_ULPI_D1 = PB_0,
102+
USB_OTG_HS_ULPI_D2 = PB_1,
103+
USB_OTG_HS_ULPI_D3 = PB_10,
104+
USB_OTG_HS_ULPI_D4 = PB_11,
105+
USB_OTG_HS_ULPI_D5 = PB_12,
106+
USB_OTG_HS_ULPI_D6 = PB_13,
107+
USB_OTG_HS_ULPI_D7 = PB_5,
108+
USB_OTG_HS_ULPI_DIR = PC_2_C,
109+
USB_OTG_HS_ULPI_NXT = PC_3_C,
110+
USB_OTG_HS_ULPI_STP = PC_0,
111+
USB_OTG_HS_VBUS = PB_13,
112+
#endif
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/*
2+
******************************************************************************
3+
**
4+
** File : LinkerScript.ld
5+
**
6+
** Author : Auto-generated by STM32CubeIDE
7+
**
8+
** Abstract : Linker script for STM32H743VI Device from STM32H7 series
9+
** 2048Kbytes FLASH
10+
** 128Kbytes DTCMRAM
11+
** 64Kbytes ITCMRAM
12+
** 512Kbytes RAM_D1
13+
** 288Kbytes RAM_D2
14+
** 64Kbytes RAM_D3
15+
**
16+
** Set heap size, stack size and stack location according
17+
** to application requirements.
18+
**
19+
** Set memory bank area and size if external memory is used.
20+
**
21+
** Target : STMicroelectronics STM32
22+
**
23+
** Distribution: The file is distributed as is without any warranty
24+
** of any kind.
25+
**
26+
*****************************************************************************
27+
** @attention
28+
**
29+
** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
30+
**
31+
** Redistribution and use in source and binary forms, with or without modification,
32+
** are permitted provided that the following conditions are met:
33+
** 1. Redistributions of source code must retain the above copyright notice,
34+
** this list of conditions and the following disclaimer.
35+
** 2. Redistributions in binary form must reproduce the above copyright notice,
36+
** this list of conditions and the following disclaimer in the documentation
37+
** and/or other materials provided with the distribution.
38+
** 3. Neither the name of STMicroelectronics nor the names of its contributors
39+
** may be used to endorse or promote products derived from this software
40+
** without specific prior written permission.
41+
**
42+
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
43+
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
44+
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
45+
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
46+
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
47+
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
48+
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
49+
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
50+
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
51+
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52+
**
53+
*****************************************************************************
54+
*/
55+
56+
/* Entry Point */
57+
ENTRY(Reset_Handler)
58+
59+
/* Highest address of the user mode stack */
60+
_estack = 0x24080000; /* end of "RAM_D1" Ram type memory */
61+
62+
_Min_Heap_Size = 0x200; /* required amount of heap */
63+
_Min_Stack_Size = 0x400; /* required amount of stack */
64+
65+
/* Memories definition */
66+
MEMORY
67+
{
68+
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
69+
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
70+
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K
71+
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
72+
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
73+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
74+
}
75+
76+
/* Sections */
77+
SECTIONS
78+
{
79+
/* The startup code into "FLASH" Rom type memory */
80+
.isr_vector :
81+
{
82+
. = ALIGN(4);
83+
KEEP(*(.isr_vector)) /* Startup code */
84+
. = ALIGN(4);
85+
} >FLASH
86+
87+
/* The program code and other data into "FLASH" Rom type memory */
88+
.text :
89+
{
90+
. = ALIGN(4);
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*(.text) /* .text sections (code) */
92+
*(.text*) /* .text* sections (code) */
93+
*(.glue_7) /* glue arm to thumb code */
94+
*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
96+
97+
KEEP (*(.init))
98+
KEEP (*(.fini))
99+
100+
. = ALIGN(4);
101+
_etext = .; /* define a global symbols at end of code */
102+
} >FLASH
103+
104+
/* Constant data into "FLASH" Rom type memory */
105+
.rodata :
106+
{
107+
. = ALIGN(4);
108+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
109+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
110+
. = ALIGN(4);
111+
} >FLASH
112+
113+
.ARM.extab : {
114+
. = ALIGN(4);
115+
*(.ARM.extab* .gnu.linkonce.armextab.*)
116+
. = ALIGN(4);
117+
} >FLASH
118+
119+
.ARM : {
120+
. = ALIGN(4);
121+
__exidx_start = .;
122+
*(.ARM.exidx*)
123+
__exidx_end = .;
124+
. = ALIGN(4);
125+
} >FLASH
126+
127+
.preinit_array :
128+
{
129+
. = ALIGN(4);
130+
PROVIDE_HIDDEN (__preinit_array_start = .);
131+
KEEP (*(.preinit_array*))
132+
PROVIDE_HIDDEN (__preinit_array_end = .);
133+
. = ALIGN(4);
134+
} >FLASH
135+
136+
.init_array :
137+
{
138+
. = ALIGN(4);
139+
PROVIDE_HIDDEN (__init_array_start = .);
140+
KEEP (*(SORT(.init_array.*)))
141+
KEEP (*(.init_array*))
142+
PROVIDE_HIDDEN (__init_array_end = .);
143+
. = ALIGN(4);
144+
} >FLASH
145+
146+
.fini_array :
147+
{
148+
. = ALIGN(4);
149+
PROVIDE_HIDDEN (__fini_array_start = .);
150+
KEEP (*(SORT(.fini_array.*)))
151+
KEEP (*(.fini_array*))
152+
PROVIDE_HIDDEN (__fini_array_end = .);
153+
. = ALIGN(4);
154+
} >FLASH
155+
156+
/* Used by the startup to initialize data */
157+
_sidata = LOADADDR(.data);
158+
159+
/* Initialized data sections into "RAM_D1" Ram type memory */
160+
.data :
161+
{
162+
. = ALIGN(4);
163+
_sdata = .; /* create a global symbol at data start */
164+
*(.data) /* .data sections */
165+
*(.data*) /* .data* sections */
166+
167+
. = ALIGN(4);
168+
_edata = .; /* define a global symbol at data end */
169+
170+
} >RAM_D1 AT> FLASH
171+
172+
/* Uninitialized data section into "RAM_D1" Ram type memory */
173+
. = ALIGN(4);
174+
.bss :
175+
{
176+
/* This is used by the startup in order to initialize the .bss section */
177+
_sbss = .; /* define a global symbol at bss start */
178+
__bss_start__ = _sbss;
179+
*(.bss)
180+
*(.bss*)
181+
*(COMMON)
182+
183+
. = ALIGN(4);
184+
_ebss = .; /* define a global symbol at bss end */
185+
__bss_end__ = _ebss;
186+
} >RAM_D1
187+
188+
/* User_heap_stack section, used to check that there is enough "RAM_D1" Ram type memory left */
189+
._user_heap_stack :
190+
{
191+
. = ALIGN(8);
192+
PROVIDE ( end = . );
193+
PROVIDE ( _end = . );
194+
. = . + _Min_Heap_Size;
195+
. = . + _Min_Stack_Size;
196+
. = ALIGN(8);
197+
} >RAM_D1
198+
199+
/* Remove information from the compiler libraries */
200+
/DISCARD/ :
201+
{
202+
libc.a ( * )
203+
libm.a ( * )
204+
libgcc.a ( * )
205+
}
206+
207+
.ARM.attributes 0 : { *(.ARM.attributes) }
208+
}
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/*
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*******************************************************************************
3+
* Copyright (c) 2020-2021, STMicroelectronics
4+
* All rights reserved.
5+
*
6+
* This software component is licensed by ST under BSD 3-Clause license,
7+
* the "License"; You may not use this file except in compliance with the
8+
* License. You may obtain a copy of the License at:
9+
* opensource.org/licenses/BSD-3-Clause
10+
*
11+
*******************************************************************************
12+
*/
13+
#if defined(STM32H743xx)
14+
#include "pins_arduino.h"
15+
16+
// Digital PinName array
17+
const PinName digitalPin[] = {
18+
PA_0, // D0/A0
19+
PA_1, // D1/A1
20+
PA_2, // D2/A2
21+
PA_3, // D3/A3
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PA_4, // D4/A4
23+
PA_5, // D5/A5
24+
PA_6, // D6/A6
25+
PA_7, // D7/A7
26+
PA_8, // D8
27+
PA_9, // D9
28+
PA_10, // D10
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PA_11, // D11
30+
PA_12, // D12
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PA_13, // D13
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PA_14, // D14
33+
PA_15, // D15
34+
PB_0, // D16/A8
35+
PB_1, // D17/A9
36+
PB_2, // D18
37+
PB_3, // D19
38+
PB_4, // D20
39+
PB_5, // D21
40+
PB_6, // D22
41+
PB_7, // D23
42+
PB_8, // D24
43+
PB_9, // D25
44+
PB_10, // D26
45+
PB_11, // D27
46+
PB_12, // D28
47+
PB_13, // D29
48+
PB_14, // D30
49+
PB_15, // D31
50+
PC_0, // D32/A10
51+
PC_1, // D33/A11
52+
PC_4, // D34/A12
53+
PC_5, // D35/A13
54+
PC_6, // D36
55+
PC_7, // D37
56+
PC_8, // D38
57+
PC_9, // D39
58+
PC_10, // D40
59+
PC_11, // D41
60+
PC_12, // D42
61+
PC_13, // D43
62+
PC_14, // D44
63+
PC_15, // D45
64+
PD_0, // D46
65+
PD_1, // D47
66+
PD_2, // D48
67+
PD_3, // D49
68+
PD_4, // D50
69+
PD_5, // D51
70+
PD_6, // D52
71+
PD_7, // D53
72+
PD_8, // D54
73+
PD_9, // D55
74+
PD_10, // D56
75+
PD_11, // D57
76+
PD_12, // D58
77+
PD_13, // D59
78+
PD_14, // D60
79+
PD_15, // D61
80+
PE_0, // D62
81+
PE_1, // D63
82+
PE_2, // D64
83+
PE_3, // D65
84+
PE_4, // D66
85+
PE_5, // D67
86+
PE_6, // D68
87+
PE_7, // D69
88+
PE_8, // D70
89+
PE_9, // D71
90+
PE_10, // D72
91+
PE_11, // D73
92+
PE_12, // D74
93+
PE_13, // D75
94+
PE_14, // D76
95+
PE_15, // D77
96+
PH_0, // D78
97+
PH_1, // D79
98+
PC_2_C, // D80/A14
99+
PC_3_C // D81/A15
100+
};
101+
102+
// Analog (Ax) pin number array
103+
const uint32_t analogInputPin[] = {
104+
0, // A0, PA0
105+
1, // A1, PA1
106+
2, // A2, PA2
107+
3, // A3, PA3
108+
4, // A4, PA4
109+
5, // A5, PA5
110+
6, // A6, PA6
111+
7, // A7, PA7
112+
16, // A8, PB0
113+
17, // A9, PB1
114+
32, // A10, PC0
115+
33, // A11, PC1
116+
34, // A12, PC4
117+
35, // A13, PC5
118+
80, // A14, PC2_C
119+
81 // A15, PC3_C
120+
};
121+
122+
/*
123+
* @brief System Clock Configuration
124+
* @param None
125+
* @retval None
126+
*/
127+
WEAK void SystemClock_Config(void)
128+
{
129+
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
130+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
131+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
132+
133+
/** Supply configuration update enable
134+
*/
135+
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
136+
/** Configure the main internal regulator output voltage
137+
*/
138+
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
139+
140+
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
141+
/** Initializes the RCC Oscillators according to the specified parameters
142+
* in the RCC_OscInitTypeDef structure.
143+
*/
144+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
145+
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
146+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
147+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
148+
RCC_OscInitStruct.PLL.PLLM = 5; // 25Mhz / 5 = 5Mhz
149+
RCC_OscInitStruct.PLL.PLLN = 192; // 25Mhz / 5 * 192 = 960Mhz
150+
RCC_OscInitStruct.PLL.PLLP = 2; // 960Mhz / 2 = 480Mhz
151+
RCC_OscInitStruct.PLL.PLLQ = 20; // 960Mhz / 20 = 48Mhz for USB
152+
RCC_OscInitStruct.PLL.PLLR = 20; // unused
153+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
154+
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
155+
RCC_OscInitStruct.PLL.PLLFRACN = 0;
156+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
157+
{
158+
Error_Handler();
159+
}
160+
/** Initializes the CPU, AHB and APB buses clocks
161+
*/
162+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
163+
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
164+
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
165+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
166+
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
167+
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
168+
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
169+
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
170+
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
171+
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
172+
173+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
174+
{
175+
Error_Handler();
176+
}
177+
178+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI
179+
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
180+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
181+
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
182+
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
183+
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
184+
185+
/* PLL1 qclk used for USB 48 Mhz */
186+
/* PLL1 qclk also used for FMC, QUADSPI, SDMMC, RNG, SAI */
187+
/* PLL2 pclk is needed for adc max 80 Mhz (p,q,r same) */
188+
/* PLL2 pclk also used for LP timers 2,3,4,5, SPI 1,2,3 */
189+
/* PLL2 qclk is needed for uart, can, spi4,5,6 80 Mhz */
190+
/* PLL3 r clk is needed for i2c 80 Mhz (p,q,r same) */
191+
PeriphClkInitStruct.PLL2.PLL2M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
192+
PeriphClkInitStruct.PLL2.PLL2N = 96; // N MUL 96
193+
PeriphClkInitStruct.PLL2.PLL2P = 2; // P div 2
194+
PeriphClkInitStruct.PLL2.PLL2Q = 2; // Q div 2
195+
PeriphClkInitStruct.PLL2.PLL2R = 2; // R div 2
196+
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
197+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_0;
198+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
199+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
200+
PeriphClkInitStruct.PLL3.PLL3M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
201+
PeriphClkInitStruct.PLL3.PLL3N = 96; // N MUL 96
202+
PeriphClkInitStruct.PLL3.PLL3P = 2; // P div 2
203+
PeriphClkInitStruct.PLL3.PLL3Q = 2; // Q div 2
204+
PeriphClkInitStruct.PLL3.PLL3R = 2; // R div 2
205+
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
206+
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_0;
207+
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOMEDIUM;
208+
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
209+
// ADC from PLL2 pclk
210+
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
211+
// USB from PLL1 qclk
212+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
213+
// QSPI from PLL1 qclk
214+
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL;
215+
// SDMMC from PLL1 qclk
216+
PeriphClkInitStruct.SdmmcClockSelection = 0;
217+
//PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
218+
// LPUART from PLL2 qclk
219+
PeriphClkInitStruct.Lpuart1ClockSelection = 0;
220+
//PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
221+
// USART from PLL2 qclk
222+
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
223+
// USART from PLL2 qclk
224+
PeriphClkInitStruct.Usart234578ClockSelection = 0;
225+
//PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
226+
// I2C123 from PLL3 rclk
227+
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
228+
// I2C4 from PLL3 rclk
229+
PeriphClkInitStruct.I2c4ClockSelection = 0;
230+
//PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
231+
// SPI123 from PLL2 pclk
232+
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
233+
// SPI45 from PLL2 qclk
234+
PeriphClkInitStruct.Spi45ClockSelection = 0;
235+
//PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
236+
// SPI6 from PLL2 qclk
237+
PeriphClkInitStruct.Spi6ClockSelection = 0;
238+
//PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
239+
240+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
241+
Error_Handler();
242+
}
243+
}
244+
245+
#endif /* ARDUINO_GENERIC_* */
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,268 @@
1+
/*
2+
*******************************************************************************
3+
* Copyright (c) 2020-2021, STMicroelectronics
4+
* All rights reserved.
5+
*
6+
* This software component is licensed by ST under BSD 3-Clause license,
7+
* the "License"; You may not use this file except in compliance with the
8+
* License. You may obtain a copy of the License at:
9+
* opensource.org/licenses/BSD-3-Clause
10+
*
11+
*******************************************************************************
12+
*/
13+
#pragma once
14+
15+
/*----------------------------------------------------------------------------
16+
* STM32 pins number
17+
*----------------------------------------------------------------------------*/
18+
#define PA0 PIN_A0
19+
#define PA1 PIN_A1
20+
#define PA2 PIN_A2
21+
#define PA3 PIN_A3
22+
#define PA4 PIN_A4
23+
#define PA5 PIN_A5
24+
#define PA6 PIN_A6
25+
#define PA7 PIN_A7
26+
#define PA8 8
27+
#define PA9 9
28+
#define PA10 10
29+
#define PA11 11
30+
#define PA12 12
31+
#define PA13 13
32+
#define PA14 14
33+
#define PA15 15
34+
#define PB0 PIN_A8
35+
#define PB1 PIN_A9
36+
#define PB2 18
37+
#define PB3 19
38+
#define PB4 20
39+
#define PB5 21
40+
#define PB6 22
41+
#define PB7 23
42+
#define PB8 24
43+
#define PB9 25
44+
#define PB10 26
45+
#define PB11 27
46+
#define PB12 28
47+
#define PB13 29
48+
#define PB14 30
49+
#define PB15 31
50+
#define PC0 PIN_A10
51+
#define PC1 PIN_A11
52+
#define PC4 PIN_A12
53+
#define PC5 PIN_A13
54+
#define PC6 36
55+
#define PC7 37
56+
#define PC8 38
57+
#define PC9 39
58+
#define PC10 40
59+
#define PC11 41
60+
#define PC12 42
61+
#define PC13 43
62+
#define PC14 44
63+
#define PC15 45
64+
#define PD0 46
65+
#define PD1 47
66+
#define PD2 48
67+
#define PD3 49
68+
#define PD4 50
69+
#define PD5 51
70+
#define PD6 52
71+
#define PD7 53
72+
#define PD8 54
73+
#define PD9 55
74+
#define PD10 56
75+
#define PD11 57
76+
#define PD12 58
77+
#define PD13 59
78+
#define PD14 60
79+
#define PD15 61
80+
#define PE0 62
81+
#define PE1 63
82+
#define PE2 64
83+
#define PE3 65
84+
#define PE4 66
85+
#define PE5 67
86+
#define PE6 68
87+
#define PE7 69
88+
#define PE8 70
89+
#define PE9 71
90+
#define PE10 72
91+
#define PE11 73
92+
#define PE12 74
93+
#define PE13 75
94+
#define PE14 76
95+
#define PE15 77
96+
#define PH0 78
97+
#define PH1 79
98+
#define PC2_C PIN_A14
99+
#define PC3_C PIN_A15
100+
#define PC2 PC2_C
101+
#define PC3 PC3_C
102+
103+
// Alternate pins number
104+
#define PA0_ALT1 (PA0 | ALT1)
105+
#define PA1_ALT1 (PA1 | ALT1)
106+
#define PA1_ALT2 (PA1 | ALT2)
107+
#define PA2_ALT1 (PA2 | ALT1)
108+
#define PA2_ALT2 (PA2 | ALT2)
109+
#define PA3_ALT1 (PA3 | ALT1)
110+
#define PA3_ALT2 (PA3 | ALT2)
111+
#define PA4_ALT1 (PA4 | ALT1)
112+
#define PA4_ALT2 (PA4 | ALT2)
113+
#define PA5_ALT1 (PA5 | ALT1)
114+
#define PA6_ALT1 (PA6 | ALT1)
115+
#define PA7_ALT1 (PA7 | ALT1)
116+
#define PA7_ALT2 (PA7 | ALT2)
117+
#define PA7_ALT3 (PA7 | ALT3)
118+
#define PA9_ALT1 (PA9 | ALT1)
119+
#define PA10_ALT1 (PA10 | ALT1)
120+
#define PA11_ALT1 (PA11 | ALT1)
121+
#define PA12_ALT1 (PA12 | ALT1)
122+
#define PA15_ALT1 (PA15 | ALT1)
123+
#define PA15_ALT2 (PA15 | ALT2)
124+
#define PB0_ALT1 (PB0 | ALT1)
125+
#define PB0_ALT2 (PB0 | ALT2)
126+
#define PB1_ALT1 (PB1 | ALT1)
127+
#define PB1_ALT2 (PB1 | ALT2)
128+
#define PB3_ALT1 (PB3 | ALT1)
129+
#define PB3_ALT2 (PB3 | ALT2)
130+
#define PB4_ALT1 (PB4 | ALT1)
131+
#define PB4_ALT2 (PB4 | ALT2)
132+
#define PB5_ALT1 (PB5 | ALT1)
133+
#define PB5_ALT2 (PB5 | ALT2)
134+
#define PB6_ALT1 (PB6 | ALT1)
135+
#define PB6_ALT2 (PB6 | ALT2)
136+
#define PB7_ALT1 (PB7 | ALT1)
137+
#define PB8_ALT1 (PB8 | ALT1)
138+
#define PB8_ALT2 (PB8 | ALT2)
139+
#define PB9_ALT1 (PB9 | ALT1)
140+
#define PB9_ALT2 (PB9 | ALT2)
141+
#define PB14_ALT1 (PB14 | ALT1)
142+
#define PB14_ALT2 (PB14 | ALT2)
143+
#define PB15_ALT1 (PB15 | ALT1)
144+
#define PB15_ALT2 (PB15 | ALT2)
145+
#define PC0_ALT1 (PC0 | ALT1)
146+
#define PC0_ALT2 (PC0 | ALT2)
147+
#define PC1_ALT1 (PC1 | ALT1)
148+
#define PC1_ALT2 (PC1 | ALT2)
149+
#define PC4_ALT1 (PC4 | ALT1)
150+
#define PC5_ALT1 (PC5 | ALT1)
151+
#define PC6_ALT1 (PC6 | ALT1)
152+
#define PC6_ALT2 (PC6 | ALT2)
153+
#define PC7_ALT1 (PC7 | ALT1)
154+
#define PC7_ALT2 (PC7 | ALT2)
155+
#define PC8_ALT1 (PC8 | ALT1)
156+
#define PC9_ALT1 (PC9 | ALT1)
157+
#define PC10_ALT1 (PC10 | ALT1)
158+
#define PC11_ALT1 (PC11 | ALT1)
159+
160+
#define NUM_DIGITAL_PINS 82
161+
#define NUM_DUALPAD_PINS 2
162+
#define NUM_ANALOG_INPUTS 16
163+
164+
// On-board LED pin number
165+
#ifndef LED_BUILTIN
166+
#define LED_BUILTIN PNUM_NOT_DEFINED
167+
#endif
168+
169+
// On-board user button
170+
#ifndef USER_BTN
171+
#define USER_BTN PNUM_NOT_DEFINED
172+
#endif
173+
174+
// SPI definitions
175+
#ifndef PIN_SPI_SS
176+
#define PIN_SPI_SS PA4
177+
#endif
178+
#ifndef PIN_SPI_SS1
179+
#define PIN_SPI_SS1 PA15
180+
#endif
181+
#ifndef PIN_SPI_SS2
182+
#define PIN_SPI_SS2 PNUM_NOT_DEFINED
183+
#endif
184+
#ifndef PIN_SPI_SS3
185+
#define PIN_SPI_SS3 PNUM_NOT_DEFINED
186+
#endif
187+
#ifndef PIN_SPI_MOSI
188+
#define PIN_SPI_MOSI PA7
189+
#endif
190+
#ifndef PIN_SPI_MISO
191+
#define PIN_SPI_MISO PA6
192+
#endif
193+
#ifndef PIN_SPI_SCK
194+
#define PIN_SPI_SCK PA5
195+
#endif
196+
197+
// I2C definitions
198+
#ifndef PIN_WIRE_SDA
199+
#define PIN_WIRE_SDA PB7
200+
#endif
201+
#ifndef PIN_WIRE_SCL
202+
#define PIN_WIRE_SCL PB6
203+
#endif
204+
205+
// Timer Definitions
206+
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
207+
#ifndef TIMER_TONE
208+
#define TIMER_TONE TIM6
209+
#endif
210+
#ifndef TIMER_SERVO
211+
#define TIMER_SERVO TIM7
212+
#endif
213+
214+
// UART Definitions
215+
#ifndef SERIAL_UART_INSTANCE
216+
#define SERIAL_UART_INSTANCE 4
217+
#endif
218+
219+
// Default pin used for generic 'Serial' instance
220+
// Mandatory for Firmata
221+
#ifndef PIN_SERIAL_RX
222+
#define PIN_SERIAL_RX PA1
223+
#endif
224+
#ifndef PIN_SERIAL_TX
225+
#define PIN_SERIAL_TX PA0
226+
#endif
227+
228+
// Extra HAL modules
229+
#if !defined(HAL_DAC_MODULE_DISABLED)
230+
#define HAL_DAC_MODULE_ENABLED
231+
#endif
232+
#if !defined(HAL_ETH_MODULE_DISABLED)
233+
#define HAL_ETH_MODULE_ENABLED
234+
#endif
235+
#if !defined(HAL_QSPI_MODULE_DISABLED)
236+
#define HAL_QSPI_MODULE_ENABLED
237+
#endif
238+
#if !defined(HAL_SD_MODULE_DISABLED)
239+
#define HAL_SD_MODULE_ENABLED
240+
#endif
241+
242+
/*----------------------------------------------------------------------------
243+
* Arduino objects - C++ only
244+
*----------------------------------------------------------------------------*/
245+
246+
#ifdef __cplusplus
247+
// These serial port names are intended to allow libraries and architecture-neutral
248+
// sketches to automatically default to the correct port name for a particular type
249+
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
250+
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
251+
//
252+
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
253+
//
254+
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
255+
//
256+
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
257+
//
258+
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
259+
//
260+
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
261+
// pins are NOT connected to anything by default.
262+
#ifndef SERIAL_PORT_MONITOR
263+
#define SERIAL_PORT_MONITOR Serial
264+
#endif
265+
#ifndef SERIAL_PORT_HARDWARE
266+
#define SERIAL_PORT_HARDWARE Serial
267+
#endif
268+
#endif

‎ini/stm32h7.ini

+21
Original file line numberDiff line numberDiff line change
@@ -38,3 +38,24 @@ build_flags = ${stm32_variant.build_flags} ${stm_flash_drive.build_flags}
3838
-DHAL_SD_MODULE_ENABLED
3939
upload_protocol = cmsis-dap
4040
debug_tool = cmsis-dap
41+
42+
#
43+
# BigTreeTech SKR V3.0 / V3.0 EZ (STM32H743VIT6 ARM Cortex-M7)
44+
#
45+
[env:STM32H743Vx_btt]
46+
extends = stm32_variant
47+
platform = ststm32@~14.1.0
48+
platform_packages = framework-arduinoststm32@https://github.com/stm32duino/Arduino_Core_STM32/archive/main.zip
49+
board = marlin_STM32H743Vx
50+
board_build.offset = 0x20000
51+
board_upload.offset_address = 0x08020000
52+
build_flags = ${stm32_variant.build_flags}
53+
-DPIN_SERIAL1_RX=PA_10 -DPIN_SERIAL1_TX=PA_9
54+
-DPIN_SERIAL3_RX=PD_9 -DPIN_SERIAL3_TX=PD_8
55+
-DPIN_SERIAL4_RX=PA_1 -DPIN_SERIAL4_TX=PA_0
56+
-DSERIAL_RX_BUFFER_SIZE=1024 -DSERIAL_TX_BUFFER_SIZE=1024
57+
-DTIMER_SERVO=TIM5 -DTIMER_TONE=TIM2
58+
-DSTEP_TIMER_IRQ_PRIO=0
59+
-DD_CACHE_DISABLED
60+
upload_protocol = cmsis-dap
61+
debug_tool = cmsis-dap

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