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RISC-V Hardware Platform Validation #208
Labels
class:Bench
class:devops
class:enhancement
priority:high
topic:Green
Climate-related stuff
topic:third_party_support
Comments
Hardware info
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Memory
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dmesg
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No error when running pyaf build tests
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Pytorch debian packages for riscv are buggy for the moment. Update : Pytorch is now working. See below |
lshw
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Pytorch debian packages : some dependencies are failing. workaround OK.
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Sample pytorch test script
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Riscv specific messages
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cpu frequencies
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Fixed |
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Labels
class:Bench
class:devops
class:enhancement
priority:high
topic:Green
Climate-related stuff
topic:third_party_support
New Hardware Architecture : RISC-V
This is a very experimental platform. PyAF intends to work on a not-yet-fully-manufactured hardware (#176 ).
The Sifive dev board (VisionFive 2) is planned through a kickstart project :
https://www.kickstarter.com/projects/starfive/visionfive-2/
Availablity : Dec. 2022
CPU features :
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