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liblms7002m.c
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/*
* lms7002m compact library source file
* Copyright (c) 2018 Sergey Kostanbaev <sergey.kostanbaev@fairwaves.co>
* For more information, please visit: http://xtrx.io
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "liblms7002m.h"
#include "lms7002m_defs.h"
#include <math.h>
/************************************************************************
* general helper functions
************************************************************************/
struct vco_nint_nfrac lms7_pll_calc(unsigned fref, unsigned vco)
{
struct vco_nint_nfrac res;
res.nint = vco / fref;
res.frac = (vco - res.nint * fref) * ((uint64_t)1 << 20) / fref;
return res;
}
// Two implimentation
// Internal definitions
//
// Tune
// Best VCO sel
// [ MIN; MAX ]
// [ MIN/k; MAX/k ] => [ (MIN+MAX)/2/k ; (MAX-MIN)/2/k ]
// distance => ((MIN+MAX)/2/k -x ) / (MAX-MIN)/2/k
//
// D = ((MIN + MAX) - 2*k*x ) / (MAX-MIN)
//
//
// (MIM+MAX) - 2*k*x = -(MIN+MAX) + 2*(k+1)*x
// (MIN+MAX) = (2*k + 1)*x
//
// x = (MIN+MAX)/(2*k+1)
//
// z + 1 = (MIN + MAX) / x / 2
//
// z => (MIN + MAX) / x / 2 +- 2
/************************************************************************
* Reset & initialization
************************************************************************/
int lms7_reset(struct lms7_state* st)
{
int res;
uint32_t reg_0x0020, reg_0x002e;
// Reset all parts in LMS
reg_0x0020 = MAKE_LMS7002_0x0020(0,0,0,0,0,0,0,0,0,0,0,0,0,0,LMS7_CH_AB);
res = lms7_spi_post(st, 1, ®_0x0020);
if (res)
return res;
reg_0x0020 = MAKE_LMS7002_0x0020(1,1,1,1,1,1,1,1,1,1,1,1,1,1,LMS7_CH_AB);
res = lms7_spi_post(st, 1, ®_0x0020);
if (res)
return res;
//Enable MIMO by default
reg_0x002e = MAKE_LMS7002_0x002E(0);
res = lms7_spi_post(st, 1, ®_0x002e);
if (res)
return res;
st->reg_0x0020 = (uint16_t)reg_0x0020;
return 0;
}
int lms7_disable(struct lms7_state* st)
{
uint32_t regs[] = {
MAKE_LMS7002_0x0081( 0, 0, 0, 0 ),
MAKE_LMS7002_0x00A6( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0),
};
return lms7_spi_post(st, REG_COUNT(regs), regs);
}
int lms7_enable(struct lms7_state* st)
{
int res = lms7_reset(st);
if (res)
return res;
res = lms7_ldo_enable(st, true);
if (res)
return res;
res = lms7_xbuf_enable(st, false, true);
if (res)
return res;
// ENDIR: All things are enabled!
uint32_t regs[] = {
MAKE_LMS7002_0x0081( 1, 1, 1, 1 ),
};
res = lms7_spi_post(st, REG_COUNT(regs), regs);
if (res)
return res;
//Check lime version
uint32_t ver;
res = lms7_spi_transact(st, LMS7002M_0x002F, &ver);
if (res)
return res;
lms7_log(st, "LMS VER:%d REV:%d MASK:%d (%04x)",
GET_LMS7002_LML_VER(ver),
GET_LMS7002_LML_REV(ver),
GET_LMS7002_LML_MASK(ver), ver);
if (GET_LMS7002_LML_VER(ver) != 7)
return -1;
if (GET_LMS7002_LML_REV(ver) != 1)
return -1;
st->reg_0x0124[0] = 0;
st->reg_0x0124[1] = 0;
st->cbst[0].rfe_tia_g = 3;
st->cbst[1].rfe_tia_g = 3;
st->rxbw_calibrated[0] = false;
st->rxbw_calibrated[1] = false;
st->txbw_calibrated[0] = false;
st->txbw_calibrated[1] = false;
return 0;
}
#define MAKE_WR_REG(reg, val) \
(((reg) << 16) | 0x80000000 | (val))
/************************************************************************
* MAC configuration
************************************************************************/
int lms7_mac_set(struct lms7_state* st, enum lms7_mac_mode mode)
{
uint32_t reg_0x0020;
uint32_t macreg =
(mode == LMS7_CH_AB) ? LMS7002_OPT_MAC_CHAB :
(mode == LMS7_CH_B) ? LMS7002_OPT_MAC_CHB :
(mode == LMS7_CH_A) ? LMS7002_OPT_MAC_CHA :
LMS7002_OPT_MAC_NONE;
// Already in needed mode?
if (GET_LMS7002_LML_MAC(st->reg_0x0020) == macreg)
return 0;
st->reg_0x0020 = (uint16_t)((~(LMS7002_LML_MAC_MSK << LMS7002_LML_MAC_OFF) & st->reg_0x0020) |
(macreg << LMS7002_LML_MAC_OFF));
reg_0x0020 = MAKE_WR_REG(LMS7002M_0x0020, st->reg_0x0020);
return lms7_spi_post(st, 1, ®_0x0020);
}
/************************************************************************
* LDO configuration
************************************************************************/
int lms7_ldo_enable(struct lms7_state* st, bool enable)
{
unsigned e = (enable) ? 1 : 0;
uint32_t lod_regs[] = {
MAKE_LMS7002_0x0092( 0, 0, 0, 0, e, e, 0, e, 0, 0, 0, e, 0, e, 0, e),
MAKE_LMS7002_0x0093( 0, 0, 0, 0, 0, 0, 0, e, e, 0, e, e, 0, 0, 0, e),
MAKE_LMS7002_0x0095( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ),
MAKE_LMS7002_0x0096( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ),
MAKE_LMS7002_0x00A6( 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1),
MAKE_LMS7002_0x00A1( 101, 101 ),
MAKE_LMS7002_0x00A4( 101, 101 ),
};
return lms7_spi_post(st, REG_COUNT(lod_regs), lod_regs);
}
/************************************************************************
* XBUF configuration
************************************************************************/
int lms7_xbuf_enable(struct lms7_state* st, bool bias, bool enable)
{
unsigned e = (enable) ? 1 : 0;
unsigned b = bias ? 1 : 0;
uint32_t reg_0x0085 = MAKE_LMS7002_0x0085( b, b, 0, 0, e, e, 0, 0, e );
return lms7_spi_post(st, 1, ®_0x0085);
}
/************************************************************************
* CGEN configuration
************************************************************************/
int lms7_cgen_disable(struct lms7_state* st)
{
uint32_t reg_0x0086 = MAKE_LMS7002_0x0086(0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0);
return lms7_spi_post(st, 1, ®_0x0086);
}
int lms7_cgen_get_comp(struct lms7_state* st)
{
uint32_t reg;
int res = lms7_spi_transact(st, LMS7002M_0x008C, ®);
if (res)
return res;
return (int)((GET_LMS7002_CGEN_VCO_CMPHO_CGEN(reg) << 1) |
GET_LMS7002_CGEN_VCO_CMPLO_CGEN(reg));
}
int lms7_cgen_find_cap(struct lms7_state* st, unsigned start, uint8_t* phi, uint8_t* plo)
{
int i;
int lo = 0, hi = -1;
int res;
// Using binary search to find lowest range
if (start > 255) {
i = 128;
for (int j = 6; j >= 0; j--) {
uint32_t cgen_regs[] = { MAKE_LMS7002_0x008B(15, (unsigned)i, 0) };
res = lms7_spi_post(st, REG_COUNT(cgen_regs), cgen_regs);
if (res)
return res;
switch ((res = lms7_cgen_get_comp(st))) {
case VCO_CMP_OK:
case VCO_CMP_HIGH:
i -= (1 << j);
break;
case VCO_CMP_LOW:
i += (1 << j);
break;
case VCO_CMP_FAIL:
return -1;
default:
return res;
}
}
lo = i;
lms7_log(st, "CGEN: binary result: %d", i);
} else {
i = (int)start;
}
for (; i < 256; i++) {
uint32_t cgen_regs[] = { MAKE_LMS7002_0x008B(15, (unsigned)i, 0) };
res = lms7_spi_post(st, REG_COUNT(cgen_regs), cgen_regs);
if (res)
return res;
// delay for at least few uS
switch ((res = lms7_cgen_get_comp(st))) {
case VCO_CMP_OK:
hi = i;
break;
case VCO_CMP_HIGH:
if (hi == -1) {
hi = (i == 0) ? 0 : i - 1;
}
goto find_high;
case VCO_CMP_LOW:
lo = i + 1;
break;
case VCO_CMP_FAIL:
return -1;
default:
return res;
}
}
find_high:
if (hi == -1)
hi = 0;
*phi = (uint8_t)hi;
*plo = (uint8_t)lo;
return 0;
}
int lms7_cgen_tune(struct lms7_state* st, unsigned outfreq, unsigned txdiv_ord)
{
// VCO div selection
unsigned kx2 = (CGEN_VCO_MID / outfreq + 1) >> 1;
if (kx2 < 1)
kx2 = 1;
else if (kx2 > 256)
kx2 = 256;
unsigned vcox2 = kx2 * outfreq;
struct vco_nint_nfrac vc = lms7_pll_calc(st->fref, vcox2 * 2);
if ((CGEN_VCO_MIN/2 > vcox2) || (CGEN_VCO_MAX/2 < vcox2)) {
// Out of range
lms7_log(st, "CGEN: VCO/2=%u is out of range, VCO may not lock!",
vcox2);
}
lms7_log(st, "CGEN: VCO/2=%u k/2=%u int=%u frac=%u",
vcox2, kx2, vc.nint, vc.frac);
uint32_t cgen_regs[] = {
MAKE_LMS7002_0x0086(0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1),
MAKE_LMS7002_0x0087(vc.frac),
MAKE_LMS7002_0x0088(vc.nint - 1, vc.frac >> 16),
MAKE_LMS7002_0x0089(0, 0, 0, txdiv_ord, kx2 - 1, 0),
MAKE_LMS7002_0x008B(15, 128, 0),
};
int res = lms7_spi_post(st, REG_COUNT(cgen_regs), cgen_regs);
if (res)
return res;
return 0;
}
int lms7_cgen_tune_sync(struct lms7_state* st, unsigned outfreq, unsigned txdiv_ord)
{
int res = lms7_cgen_tune(st, outfreq, txdiv_ord);
if (res < 0)
return res;
// 20uS settelment time
usleep(20);
res = lms7_cgen_get_comp(st);
if (res < 0)
return res;
if (res != VCO_CMP_OK) {
// Sweep over CAP values
usleep(20);
uint8_t hi, lo;
res = lms7_cgen_find_cap(st, (unsigned)-1, &hi, &lo);
if (res < 0)
return res;
if (hi <= lo) {
lms7_log(st, "CGEN: Can't find sutable VCO cap!");
res = -1;
goto tune_failed;
}
lms7_log(st, "CGEN: Retuned [%d:%d] -> %d", lo, hi, (hi+lo)/2u);
uint32_t cgen_regs[] = {
MAKE_LMS7002_0x008B(15, (hi+lo)/2u, 0),
};
res = lms7_spi_post(st, REG_COUNT(cgen_regs), cgen_regs);
if (res < 0)
return res;
}
//TODO: Disable COMPARATOR power
return 0;
tune_failed:
lms7_cgen_disable(st);
return res;
}
/************************************************************************
* SXX configuration (RX -> CHA; TX -> CHB)
************************************************************************/
enum sxx_vco_params {
SXX_VCOL_MIN = 1900000000U,
SXX_VCOL_MAX = 2611000000U,
SXX_VCOL_MID = SXX_VCOL_MIN / 2 + SXX_VCOL_MAX / 2,
SXX_VCOL_RANGE = SXX_VCOL_MAX - SXX_VCOL_MIN,
SXX_VCOM_MIN = 2481000000U,
SXX_VCOM_MAX = 3377000000U,
SXX_VCOM_MID = SXX_VCOM_MIN / 2 + SXX_VCOM_MAX / 2,
SXX_VCOM_RANGE = SXX_VCOM_MAX - SXX_VCOM_MIN,
SXX_VCOH_MIN = 3153000000U,
SXX_VCOH_MAX = 3857000000U,
SXX_VCOH_MID = SXX_VCOH_MIN / 2 + SXX_VCOH_MAX / 2,
SXX_VCOH_RANGE = SXX_VCOH_MAX - SXX_VCOH_MIN,
};
int lms7_sxx_get_comp(struct lms7_state* st)
{
uint32_t reg;
int res = lms7_spi_transact(st, LMS7002M_0x0123, ®);
if (res)
return res;
return (int)((GET_LMS7002_SXX_VCO_CMPHO(reg) << 1) |
GET_LMS7002_SXX_VCO_CMPLO(reg));
}
int lms7_sxx_find_cap(struct lms7_state* st, unsigned start, unsigned vcono,
uint8_t* phi, uint8_t* plo)
{
int i;
int lo = 0, hi = -1;
int res;
// Using binary search to find lowest range
if (start > 255) {
i = 128;
for (int j = 6; j >= 0; j--) {
uint32_t sxx_regs[] = { MAKE_LMS7002_0x0121(16, (unsigned)i, vcono, 0) };
res = lms7_spi_post(st, REG_COUNT(sxx_regs), sxx_regs);
if (res)
return res;
res = lms7_sxx_get_comp(st);
switch (res) {
case VCO_CMP_OK:
case VCO_CMP_HIGH:
i -= (1 << j);
break;
case VCO_CMP_LOW:
i += (1 << j);
break;
case VCO_CMP_FAIL:
return -1;
default:
return res;
}
}
lo = i;
lms7_log(st, "SXX: binary result: %d", i);
} else {
i = (int)start;
}
for (; i < 256; i++) {
uint32_t sxx_regs[] = { MAKE_LMS7002_0x0121(16, (unsigned)i, vcono, 0) };
res = lms7_spi_post(st, REG_COUNT(sxx_regs), sxx_regs);
if (res)
return res;
// delay for at least few uS
res = lms7_sxx_get_comp(st);
switch (res) {
case VCO_CMP_OK:
hi = i;
break;
case VCO_CMP_HIGH:
if (hi == -1) {
hi = (i == 0) ? 0 : i - 1;
}
goto find_high;
case VCO_CMP_LOW:
lo = i + 1;
break;
case VCO_CMP_FAIL:
return -1;
default:
return res;
}
}
find_high:
if (hi == -1)
hi = 0;
*phi = (uint8_t)hi;
*plo = (uint8_t)lo;
return 0;
}
int lms7_sxx_disable(struct lms7_state* st, bool rx)
{
st->reg_0x0124[rx ? 0 : 1] &= ~(1u << LMS7002_SXX_EN_DIR_SXX_OFF);
uint32_t sxx_regs[] = {
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) |
(rx ? LMS7002_OPT_MAC_CHA : LMS7002_OPT_MAC_CHB)),
MAKE_WR_REG(LMS7002M_0x0124, st->reg_0x0124[rx ? 0 : 1]),
};
return lms7_spi_post(st, REG_COUNT(sxx_regs), sxx_regs);
}
static int _sxx_set_vcon(struct lms7_state* st, unsigned i,
unsigned sxx_vco, bool lochen)
{
struct vco_nint_nfrac vc;
vc = lms7_pll_calc(i == 3 ? st->fref / 2 : st->fref, sxx_vco);
lms7_log(st, "SXX: VCO%u N=%d frac=%d", i, vc.nint, vc.frac);
uint32_t sxx_pll_regs[] = {
MAKE_LMS7002_0x011C(1, 0, 0, 0, 1, /*i == 0 ? 0 :*/ 1u,
0, 1, 0,
(lochen) ? 0 : 1u, //PD_LOCH_T2RBUF,
0, 0, 0, 0, 0, 1),
MAKE_LMS7002_0x011D(vc.frac),
MAKE_LMS7002_0x011E(vc.nint - 4, vc.frac >> 16),
};
return lms7_spi_post(st, REG_COUNT(sxx_pll_regs), sxx_pll_regs);
}
int lms7_sxx_tune_sync(struct lms7_state* st, bool rx, unsigned lofreq,
bool lochen)
{
unsigned divh = 0;
unsigned sxx_vco = lofreq;
int res = lms7_mac_set(st, (rx) ? LMS7_CH_A : LMS7_CH_B);
if (res < 0)
return res;
if (sxx_vco > SXX_VCOH_MAX) {
lms7_log(st, "SX%c: LO=%d is out of rnage",
(rx ? 'R' : 'T'), lofreq);
return -1;
}
while (sxx_vco < SXX_VCOL_MIN) {
if (divh >= 6) {
// Unable to deliver frequency
lms7_log(st, "SX%c: LO=%d is out of rnage (VCO=%u)",
(rx ? 'R' : 'T'), lofreq, sxx_vco);
return -1;
}
divh++;
sxx_vco <<= 1;
}
st->reg_0x0124[rx ? 0 : 1] |= 1u << LMS7002_SXX_EN_DIR_SXX_OFF;
uint32_t sxx_regsq[] = {
MAKE_WR_REG(LMS7002M_0x0124, st->reg_0x0124[rx ? 0 : 1]),
MAKE_LMS7002_0x0120(204, 192),
MAKE_LMS7002_0x0122(0, 20, 20) | (1u<<13),
MAKE_LMS7002_0x011C(1, //RESET_N
0, //SPDUP_VCO
0, //BYPLDO_VCO
0, //EN_COARSEPLL
1, //CURLIM_VCO
1u, //EN_DIV2_DIVPROG
0, //EN_INTONLY_SDM
1, //EN_SDM_CLK
0, //PD_FBDIV
(lochen) ? 0 : 1u, //PD_LOCH_T2RBUF
0, //PD_CP
0, //PD_FDIV
0, //PD_SDM
0, //PD_VCO_COMP
0, //PD_VCO
1),
MAKE_LMS7002_0x011F(3, 3, 6, 0, 0, 0, 0),
};
res = lms7_spi_post(st, REG_COUNT(sxx_regsq), sxx_regsq);
if (res)
return res;
//VCO selection
bool vcol_ok = (SXX_VCOL_MIN < sxx_vco) && (sxx_vco < SXX_VCOL_MAX);
bool vcom_ok = (SXX_VCOM_MIN < sxx_vco) && (sxx_vco < SXX_VCOM_MAX);
bool vcoh_ok = (SXX_VCOH_MIN < sxx_vco) && (sxx_vco < SXX_VCOH_MAX);
bool vcop_ok = (SXX_VCOH_MIN/2 < sxx_vco) && (sxx_vco < SXX_VCOH_MAX/2) && (divh < 6);
lms7_log(st, "SX%c: initial VCO=%u DIVH=%u VCOs:%d%d%d%d",
(rx ? 'R' : 'T'), sxx_vco, divh,
vcol_ok, vcom_ok, vcoh_ok, vcop_ok);
// TODO Calculate cap value using LUT and temperature
static const unsigned vcono[4] = { 0, 1, 2, 2 };
bool vcoit[4] = { vcol_ok, vcom_ok, vcoh_ok, vcop_ok };
int pcap = -1;
unsigned pvco_idx = 0;
unsigned good = 0;
for (unsigned t = 0; t < 8; t++) {
pcap = -1;
pvco_idx = 0;
uint8_t plo = 0, phi = 0;
for (unsigned i = 0; i < 4; i++) {
if (!vcoit[i])
continue;
res = _sxx_set_vcon(st, i, sxx_vco, lochen);
if (res)
return res;
res = lms7_sxx_find_cap(st, (unsigned)-1, vcono[i], &phi, &plo);
if (res != 0)
return res;
if (phi < plo)
continue;
int mid = ((int)plo + phi) / 2;
lms7_log(st, "SX%c: VCO%d [%d;%d] -> %d",
(rx ? 'R' : 'T'), i, plo, phi, mid);
if (pcap == -1 || pcap > mid) {
pcap = mid;
pvco_idx = i;
} if (i == 3 && pcap != -1 && pvco_idx != 3) {
lms7_log(st, "SX%c: restore to VCO%d",
(rx ? 'R' : 'T'), pvco_idx);
//Restore previous PLL settings
res = _sxx_set_vcon(st, pvco_idx, sxx_vco, lochen);
if (res)
return res;
}
}
if (pcap != -1 && !(plo == 0 && phi == 0)) {
good++;
if (good > 1)
break;
} else {
usleep(1000);
}
}
if (pcap == -1) {
lms7_log(st, "SX%c: Unable to tune to VCO=%u",
(rx ? 'R' : 'T'), sxx_vco);
return -2;
}
if (pvco_idx == 3) {
divh++;
}
uint32_t sxx_regs[] = {
MAKE_LMS7002_0x011F(3, 3, divh, 0, 0, 0, 0),
MAKE_LMS7002_0x0121(16, (unsigned)pcap, vcono[pvco_idx], 0),
};
res = lms7_spi_post(st, REG_COUNT(sxx_regs), sxx_regs);
if (res)
return res;
return 0;
}
/************************************************************************
* LML configuration
************************************************************************/
int lms7_lml_configure(struct lms7_state* st, bool rx_port_1,
unsigned txdiv, unsigned rxdiv,
enum lml_mode mode)
{
unsigned lml1_rx = (rx_port_1) ? 1 : 0;
unsigned txmclk = (txdiv <= 1) ? LMS7002_OPT_MCLK1SRC_TXTSPCLKA : LMS7002_OPT_MCLK1SRC_TXTSPCLKA_DIV;
unsigned rxmclk = (rxdiv <= 1) ? LMS7002_OPT_MCLK1SRC_RXTSPCLKA : LMS7002_OPT_MCLK1SRC_RXTSPCLKA_DIV;
unsigned rxmux = ((mode & 0x3) == LML_NORMAL) ? LMS7002_OPT_RX_MUX_RXTSP :
((mode & 0x3) == LML_LOOPBACK) ? LMS7002_OPT_RX_MUX_TXFIFO :
LMS7002_OPT_RX_MUX_LFSR;
unsigned rdclk = ((mode & LML_RD_FCLK) || (mode == LML_LOOPBACK)) ?
((lml1_rx) ? LMS7002_OPT_TXWRCLK_MUX_FCLK2 : LMS7002_OPT_TXWRCLK_MUX_FCLK1) :
((lml1_rx) ? LMS7002_OPT_RXRDCLK_MUX_MCLK1 : LMS7002_OPT_RXRDCLK_MUX_MCLK2);
uint32_t regs[] = {
MAKE_LMS7002_0x0022((mode & LML_DS_HIGH) ? 1u : 0, //DIQ2_DS,
0, //DIQ2_PE,
0, //IQ_SET_EN_2_PE,
0, //TXNRX2_PE,
0, //FCLK2_PE,
0, //MCLK2_PE,
(mode & LML_DS_HIGH) ? 1u : 0, //DIQ1_DS,
0, //DIQ1_PE,
0, //IQ_SET_EN_1_PE,
0, //TXNRX1_PE,
0, //FCLK1_PE,
0),
MAKE_LMS7002_0x0023(0, LMS7002_OPT_DIQDIR2_INPUT, 0, LMS7002_OPT_ENABLEDIR2_INPUT,
0, LMS7002_OPT_DIQDIR1_INPUT, 0, LMS7002_OPT_ENABLEDIR1_INPUT,
1, //Enable LML
0,
(lml1_rx) ? 0 : 1u,
LMS7002_OPT_LML2_MODE_TRXIQ,
0,
(lml1_rx) ? 1u : 0,
LMS7002_OPT_LML1_MODE_TRXIQ ),
MAKE_LMS7002_0x002A(rxmux,
(lml1_rx) ? LMS7002_OPT_TX_MUX_PORT2 : LMS7002_OPT_TX_MUX_PORT1,
LMS7002_OPT_TXRDCLK_MUX_TXTSPCLK,
(lml1_rx) ? LMS7002_OPT_TXWRCLK_MUX_FCLK2 : LMS7002_OPT_TXWRCLK_MUX_FCLK1,
rdclk, //(lml1_rx) ? LMS7002_OPT_RXRDCLK_MUX_MCLK1 : LMS7002_OPT_RXRDCLK_MUX_MCLK2,
LMS7002_OPT_RXWRCLK_MUX_RXTSPCLK ),
MAKE_LMS7002_0x002B(0, 0, 0, 0,
(rx_port_1) ? txmclk : rxmclk,
(rx_port_1) ? rxmclk : txmclk,
(txdiv > 1) ? 1u : 0,
(rxdiv > 1) ? 1u : 0),
MAKE_LMS7002_0x002C( txdiv / 2u - 1u, rxdiv / 2u - 1u )
};
return lms7_spi_post(st, REG_COUNT(regs), regs);
}
struct lml_positions {
uint8_t aip;
uint8_t aqp;
uint8_t bip;
uint8_t bqp;
};
static struct lml_positions _lms7_lml_fill_positions(struct lml_map m)
{
struct lml_positions p = {0, 0, 0, 0};
for (unsigned i = 0; i < 4; i++) {
if (m.l[i] == LMS7002_OPT_LML1_S0S_AQ)
p.aqp = i;
else if (m.l[i] == LMS7002_OPT_LML1_S0S_AI)
p.aip = i;
else if (m.l[i] == LMS7002_OPT_LML1_S0S_BQ)
p.bqp = i;
else if (m.l[i] == LMS7002_OPT_LML1_S0S_BI)
p.bip = i;
}
return p;
}
int lms7_lml_set_map(struct lms7_state* st, struct lml_map l1m, struct lml_map l2m)
{
struct lml_positions l1p = _lms7_lml_fill_positions(l1m);
struct lml_positions l2p = _lms7_lml_fill_positions(l2m);
uint32_t regs[] = {
MAKE_LMS7002_0x0024(l1m.l[3], l1m.l[2], l1m.l[1], l1m.l[0],
l1p.bqp, l1p.bip, l1p.aqp, l1p.aip),
MAKE_LMS7002_0x0027(l2m.l[3], l2m.l[2], l2m.l[1], l2m.l[0],
l2p.bqp, l2p.bip, l2p.aqp, l2p.aip),
};
return lms7_spi_post(st, REG_COUNT(regs), regs);
}
static int _sxx_update_endir(struct lms7_state* st)
{
lms7_log(st, "0x0124[%02x, %02x]", st->reg_0x0124[0], st->reg_0x0124[1]);
uint32_t regs[] = {
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHA),
MAKE_WR_REG(LMS7002M_0x0124, st->reg_0x0124[0]),
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHB),
MAKE_WR_REG(LMS7002M_0x0124, st->reg_0x0124[1]),
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020)),
};
return lms7_spi_post(st, REG_COUNT(regs), regs);
}
/************************************************************************
* RFE configuration
************************************************************************/
int lms7_rfe_disable(struct lms7_state* st)
{
if (GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHA) {
st->reg_0x0124[0] &= ~(1u << LMS7002_SXX_EN_DIR_RFE_OFF);
}
if (GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHB) {
st->reg_0x0124[1] &= ~(1u << LMS7002_SXX_EN_DIR_RFE_OFF);
}
return _sxx_update_endir(st);
}
int lms7_rfe_set_path(struct lms7_state* st, enum rfe_path p, bool rfea_en, bool rfeb_en)
{
unsigned path = (p == RFE_LNAH || p == RFE_LBH) ? LMS7002_OPT_SEL_PATH_RFE_LNAH :
(p == RFE_LNAL || p == RFE_LBL) ? LMS7002_OPT_SEL_PATH_RFE_LNAL :
(p == RFE_LNAW || p == RFE_LBW) ? LMS7002_OPT_SEL_PATH_RFE_LNAW :
LMS7002_OPT_SEL_PATH_RFE_NONE;
unsigned mimo = ((GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHAB) == LMS7002_OPT_MAC_CHAB);
unsigned chb = ((GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHAB) == LMS7002_OPT_MAC_CHB);
bool do_en = false;
if (rfea_en || rfeb_en) {
if (!(st->reg_0x0124[0] & (1u << LMS7002_SXX_EN_DIR_RFE_OFF))) {
st->reg_0x0124[0] |= 1u << LMS7002_SXX_EN_DIR_RFE_OFF;
do_en = true;
}
}
if (rfeb_en) {
if (!(st->reg_0x0124[1] & (1u << LMS7002_SXX_EN_DIR_RFE_OFF))) {
st->reg_0x0124[1] |= 1u << LMS7002_SXX_EN_DIR_RFE_OFF;
do_en = true;
}
}
if (do_en) {
int res = _sxx_update_endir(st);
if (res)
return res;
if (!rfea_en) {
uint32_t regs[] = {
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHA),
MAKE_LMS7002_0x010C(8, //CDC_I_RFE,
8, //CDC_Q_RFE,
1u, // PD_LNA_RFE,
1u, // PD_RLOOPB_1_RFE,
1u, // PD_RLOOPB_2_RFE,
1, // PD_MXLOBUF_RFE,
1, // PD_QGEN_RFE,
1, // PD_RSSI_RFE,
1, // PD_TIA_RFE,
1u //EN_G_RFE
),
MAKE_LMS7002_0x010D(LMS7002_OPT_SEL_PATH_RFE_NONE, // SEL_PATH_RFE,
0, //EN_DCOFF_RXFE_RFE,
0, // EN_INSHSW_LB1_RFE,
0, // EN_INSHSW_LB2_RFE,
0, // EN_INSHSW_L_RFE,
0, // EN_INSHSW_W_RFE,
rfeb_en ? 1u : 0 //EN_NEXTRX_RFE
),
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020)),
};
res = lms7_spi_post(st, REG_COUNT(regs), regs);
if (res)
return res;
}
}
uint32_t regs[] = {
//Channel A
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHA),
MAKE_LMS7002_0x010C( 8, //CDC_I_RFE,
8, //CDC_Q_RFE,
rfea_en && (p == RFE_LNAH || p == RFE_LNAW || p == RFE_LNAL) ? 0u : 1u, // PD_LNA_RFE,
rfea_en && (p == RFE_LBW || p == RFE_LBH) ? 0u : 1u, // PD_RLOOPB_1_RFE,
rfea_en && (p == RFE_LBL) ? 0u : 1u, // PD_RLOOPB_2_RFE,
(rfea_en) ? 0 : 1u, // PD_MXLOBUF_RFE,
(rfea_en) ? 0 : 1u, // PD_QGEN_RFE,
1, // PD_RSSI_RFE,
(rfea_en) ? 0 : 1u, // PD_TIA_RFE,
(p == RFE_NONE) ? 0u : 1u //EN_G_RFE
),
MAKE_LMS7002_0x010D( path, // SEL_PATH_RFE,
1, //EN_DCOFF_RXFE_RFE,
!rfea_en || (p == RFE_LBW || p == RFE_LBH) ? 0u : 1u, // EN_INSHSW_LB1_RFE,
!rfea_en || (p == RFE_LBL) ? 0u : 1u, // EN_INSHSW_LB2_RFE,
!rfea_en || (p == RFE_LNAL) ? 0u : 1u, // EN_INSHSW_L_RFE,
!rfea_en || (p == RFE_LNAW) ? 0u : 1u, // EN_INSHSW_W_RFE,
rfeb_en ? 1u : 0 //EN_NEXTRX_RFE
),
MAKE_LMS7002_0x010F((p == RFE_LBW || p == RFE_LBH || p == RFE_LBL) ? 3 : 0, 2, 2),
MAKE_WR_REG(LMS7002M_0x0020, st->reg_0x0020),
// Channel B
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHB),
MAKE_LMS7002_0x010C( 8, //CDC_I_RFE,
8, //CDC_Q_RFE,
(p == RFE_LNAH || p == RFE_LNAW || p == RFE_LNAL) ? 0u : 1u, // PD_LNA_RFE,
(p == RFE_LBW || p == RFE_LBH) ? 0u : 1u, // PD_RLOOPB_1_RFE,
(p == RFE_LBL) ? 0u : 1u, // PD_RLOOPB_2_RFE,
0, // PD_MXLOBUF_RFE,
0, // PD_QGEN_RFE,
1, // PD_RSSI_RFE,
0, // PD_TIA_RFE,
(p == RFE_NONE || !rfeb_en) ? 0u : 1u //EN_G_RFE
),
MAKE_LMS7002_0x010D( path, // SEL_PATH_RFE,
1, //EN_DCOFF_RXFE_RFE,
(p == RFE_LBW || p == RFE_LBH) ? 0u : 1u, // EN_INSHSW_LB1_RFE,
(p == RFE_LBL) ? 0u : 1u, // EN_INSHSW_LB2_RFE,
(p == RFE_LNAL) ? 0u : 1u, // EN_INSHSW_L_RFE,
(p == RFE_LNAW) ? 0u : 1u, // EN_INSHSW_W_RFE,
0 //EN_NEXTRX_RFE
),
MAKE_LMS7002_0x010F((p == RFE_LBW || p == RFE_LBH || p == RFE_LBL) ? 3 : 0, 2, 2),
MAKE_WR_REG(LMS7002M_0x0020, st->reg_0x0020),
};
return lms7_spi_post(st,
(mimo) ? REG_COUNT(regs) : (REG_COUNT(regs)/2),
(chb) ? regs + (REG_COUNT(regs)/2) : regs);
}
static unsigned _lowerbound(uint8_t* a, uint8_t v, unsigned sz)
{
unsigned i = sz / 2, j = sz / 4;
for (; j != 0; j = j / 2) {
if (a[i] < v) {
i -= j;
} else {
i += j;
}
}
if (a[i] < v) {
i--;
}
return i;
}
static int _lms7_rfe_update_gains(struct lms7_state* st)
{
unsigned mimo = ((GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHAB) == LMS7002_OPT_MAC_CHAB);
unsigned chb = ((GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHAB) == LMS7002_OPT_MAC_CHB);
uint32_t regs[] = {
// Channel A
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHA),
MAKE_LMS7002_0x0113(st->cbst[0].rfe_lna_g, 0, st->cbst[0].rfe_tia_g),
MAKE_WR_REG(LMS7002M_0x0020, st->reg_0x0020),
// Channel B
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHB),
MAKE_LMS7002_0x0113(st->cbst[1].rfe_lna_g, 0, st->cbst[1].rfe_tia_g),
MAKE_WR_REG(LMS7002M_0x0020, st->reg_0x0020),
};
return lms7_spi_post(st,
(mimo) ? REG_COUNT(regs) : (REG_COUNT(regs)/2),
(chb) ? regs + (REG_COUNT(regs)/2) : regs);
}
int lms7_rfe_set_lna(struct lms7_state* st, unsigned atten, unsigned *paout)
{
uint8_t attens[] = {
30, 30, 27, 24, 21, 18, 15, 12, 9, 6, 5, 4, 3, 2, 1, 0
};
unsigned i = _lowerbound(attens, atten, REG_COUNT(attens));
if (paout) {
*paout = attens[i];
}
lms7_log(st, "RFE: set_lna(%d -> %d) => %d", atten, attens[i], i);
if (GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHA) {
st->cbst[0].rfe_lna_g = i;
}
if (GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHB) {
st->cbst[1].rfe_lna_g = i;
}
return _lms7_rfe_update_gains(st);
}
int lms7_rfe_set_tia(struct lms7_state* st, unsigned atten, unsigned *paout)
{
const uint8_t attens[] = {
255, 12, 3, 0
};
unsigned i = _lowerbound(attens, atten, REG_COUNT(attens));
if (paout) {
*paout = attens[i];
}
lms7_log(st, "RFE: set_tia(%d -> %d) => %d", atten, attens[i], i);
if (GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHA) {
st->cbst[0].rfe_tia_g = i;
}
if (GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHB) {
st->cbst[1].rfe_tia_g = i;
}
return _lms7_rfe_update_gains(st);
}
int lms7_rfe_set_lblna(struct lms7_state* st, unsigned attenx4, unsigned *paout)
{
uint8_t attens[] = {
160, 96, 68, 56, 44, 36, 30, 25, 20, 16, 12, 10, 6, 4, 2, 0
};
unsigned i = _lowerbound(attens, attenx4, REG_COUNT(attens));
if (paout) {
*paout = attens[i];
}
lms7_log(st, "RFE: set_lblna(%d -> %d) => %d", attenx4, attens[i], i);
unsigned mimo = ((GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHAB) == LMS7002_OPT_MAC_CHAB);
unsigned chb = ((GET_LMS7002_LML_MAC(st->reg_0x0020) & LMS7002_OPT_MAC_CHAB) == LMS7002_OPT_MAC_CHB);
uint32_t regs[] = {
// Channel A
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHA),
MAKE_LMS7002_0x0113(1, i, st->cbst[0].rfe_tia_g),
MAKE_WR_REG(LMS7002M_0x0020, st->reg_0x0020),
// Channel B
MAKE_WR_REG(LMS7002M_0x0020, (st->reg_0x0020 & ~0x3u) | LMS7002_OPT_MAC_CHB),
MAKE_LMS7002_0x0113(1, i, st->cbst[1].rfe_tia_g),
MAKE_WR_REG(LMS7002M_0x0020, st->reg_0x0020),
};
return lms7_spi_post(st,
(mimo) ? REG_COUNT(regs) : (REG_COUNT(regs)/2),