updated DRC

Author: generationmake

kicad_source/OpenCyphalPicoBase.kicad_pcb

@@ -6069,7 +6069,6 @@
   (segment (start 71.650468 97.751172) (end 72.20082 97.20082) (width 0.2) (layer "B.Cu") (net 31) (tstamp 17a22033-2c81-4ff7-8eca-66cd5e75543b))
   (segment (start 73.4 90.7) (end 73.4 95.3) (width 0.2) (layer "B.Cu") (net 31) (tstamp 3371e293-5c2d-4ddf-8ba6-eace57fe0b88))
   (segment (start 71.650468 98.750468) (end 71.650468 97.751172) (width 0.2) (layer "B.Cu") (net 31) (tstamp 477aa180-8256-4591-b492-3f8414012ad1))
-  (segment (start 72.20082 97.20082) (end 71.900819 97.50082) (width 0.2) (layer "B.Cu") (net 31) (tstamp 550419ac-eec2-4ef3-ac08-f166bfaec8cd))
   (segment (start 71.7 98.8) (end 71.650468 98.750468) (width 0.2) (layer "B.Cu") (net 31) (tstamp b04ebfa0-87b5-4831-8938-33d6fc79eded))
   (segment (start 66.73 84.03) (end 73.4 90.7) (width 0.2) (layer "B.Cu") (net 31) (tstamp bfd9962e-6f27-4dcd-a4ea-9948a1410bd6))
   (segment (start 66.73 83.97) (end 66.73 84.03) (width 0.2) (layer "B.Cu") (net 31) (tstamp c04704d4-a849-4e50-adba-594d531da6cf))
@@ -17292,10 +17291,8 @@
         (xy 72.7915 95.6974)
         (xy 72.771498 95.765521)
         (xy 72.7546 95.78649)
-        (xy 71.798749 96.742342)
-        (xy 71.442342 97.098748)
-        (xy 71.442339 97.098752)
-        (xy 71.254234 97.286857)
+        (xy 71.798748 96.742343)
+        (xy 71.254227 97.286864)
         (xy 71.241843 97.297724)
         (xy 71.216481 97.317185)
         (xy 71.191994 97.349097)

kicad_source/OpenCyphalPicoBase.kicad_prl

@@ -1,6 +1,6 @@
 {
   "board": {
-    "active_layer": 0,
+    "active_layer": 37,
     "active_layer_preset": "All Copper Layers",
     "auto_track_width": true,
     "hidden_nets": [],