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Merge pull request #873 from Altaflux/xip_cs1
Implement support for XipCS1 pin function.
2 parents c2f5022 + d8ffef4 commit e78fa4c

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rp235x-hal/src/gpio/func.rs

+5-1
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,8 @@ pub enum DynFunction {
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/// The 'Clock' function. This can be used to input or output clock references to or from the
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/// rp235x.
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Clock,
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/// The XIP CS1 function.
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XipCs1,
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/// The 'USB' function. Only VBUS detect, VBUS enable and overcurrent detect are configurable.
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/// Other USB io have dedicated pins.
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Usb,
@@ -105,7 +107,7 @@ macro_rules! pin_func {
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})*
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};
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}
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pin_func!(Xip, Spi, Uart, I2c as I2C, Pwm, Pio0, Pio1, Pio2, Clock, Usb, UartAux, Null);
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pin_func!(Xip, Spi, Uart, I2c as I2C, Pwm, Pio0, Pio1, Pio2, Clock, XipCs1, Usb, UartAux, Null);
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//==============================================================================
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// SIO sub-types
@@ -169,6 +171,7 @@ impl DynFunction {
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let dyn_pin = id.as_dyn();
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match (self, dyn_pin.bank, dyn_pin.num) {
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(Xip, Bank0, _) => false,
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(XipCs1, Bank0, 0 | 8 | 19 | 47) => true,
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(Clock, _, 0..=19 | 26..=29) => false,
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(UartAux, _, n) if (n & 0x02) == 0 => false,
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(_, Bank0, 0..=29) => true,
@@ -205,6 +208,7 @@ pin_valid_func!(
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[2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27]
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);
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pin_valid_func!(bank0 as Gpio, [Clock], [20, 21, 22, 23, 24, 25]);
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pin_valid_func!(bank0 as Gpio, [XipCs1], [0, 8, 19, 47]);
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pin_valid_func!(qspi as Qspi, [Xip, Null], [Sclk, Sd0, Sd1, Sd2, Sd3, Ss]);
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macro_rules! pin_valid_func_sio {

rp235x-hal/src/gpio/pin.rs

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Original file line numberDiff line numberDiff line change
@@ -168,6 +168,7 @@ pub(crate) fn set_function<P: PinId>(pin: &P, function: DynFunction) {
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DynFunction::Pio1 => FUNCSEL_A::PIO1,
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DynFunction::Pio2 => FUNCSEL_A::PIO2,
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DynFunction::Clock => FUNCSEL_A::GPCK,
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DynFunction::XipCs1 => FUNCSEL_A::GPCK,
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DynFunction::Usb => FUNCSEL_A::USB,
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DynFunction::UartAux => FUNCSEL_A::UART_AUX,
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DynFunction::Null => FUNCSEL_A::NULL,

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