ARM: Fix missing immarg for space intrinsic

llvm-svn: 366280

Author: arsenm

llvm/include/llvm/IR/IntrinsicsARM.td

@@ -19,7 +19,7 @@ let TargetPrefix = "arm" in {  // All intrinsics start with "llvm.arm.".
 // A space-consuming intrinsic primarily for testing ARMConstantIslands. The
 // first argument is the number of bytes this "instruction" takes up, the second
 // and return value are essentially chains, used to force ordering during ISel.
-def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [ImmArg<0>]>;
 
 // 16-bit multiplications
 def int_arm_smulbb : GCCBuiltin<"__builtin_arm_smulbb">,

llvm/test/Verifier/ARM/intrinsic-immarg.ll

@@ -100,3 +100,12 @@ define void @mcrr2(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) {
   call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4)
   ret void
 }
+
+declare i32 @llvm.arm.space(i32, i32) nounwind
+define i32 @space(i32 %arg0, i32 %arg1) {
+  ; CHECK: immarg operand has non-immediate parameter
+  ; CHECK-NEXT: i32 %arg0
+  ; CHECK-NEXT: call i32 @llvm.arm.space(i32 %arg0, i32 %arg1)
+  %space = call i32 @llvm.arm.space(i32 %arg0, i32 %arg1)
+  ret i32 %space
+}