[NFC][test] Fix for riscv tests.

Following tests need updating for: https://reviews.llvm.org/D55277

llvm-svn: 366183

Author: plotfi

lld/test/ELF/riscv-call.s

@@ -8,18 +8,18 @@
 # RUN: llvm-objdump -d %t.rv32 | FileCheck %s
 # RUN: llvm-objdump -d %t.rv64 | FileCheck %s
 # CHECK:      97 00 00 00     auipc   ra, 0
-# CHECK-NEXT: e7 80 80 00     jalr    ra, ra, 8
+# CHECK-NEXT: e7 80 80 00     jalr    8(ra)
 # CHECK:      97 00 00 00     auipc   ra, 0
-# CHECK-NEXT: e7 80 80 ff     jalr    ra, ra, -8
+# CHECK-NEXT: e7 80 80 ff     jalr    -8(ra)
 
 # RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+8-0x80000800 -o %t.rv32.limits
 # RUN: ld.lld %t.rv64.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+8-0x80000800 -o %t.rv64.limits
 # RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS %s
 # RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS %s
 # LIMITS:      97 f0 ff 7f     auipc   ra, 524287
-# LIMITS-NEXT: e7 80 f0 7f     jalr    ra, ra, 2047
+# LIMITS-NEXT: e7 80 f0 7f     jalr    2047(ra)
 # LIMITS-NEXT: 97 00 00 80     auipc   ra, 524288
-# LIMITS-NEXT: e7 80 00 80     jalr    ra, ra, -2048
+# LIMITS-NEXT: e7 80 00 80     jalr    -2048(ra)
 
 # RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o %t
 # RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o %t 2>&1 | FileCheck --check-prefix=ERROR %s

lld/test/ELF/riscv-plt.s

@@ -47,16 +47,16 @@
 ## Direct call
 ## foo - . = 0x11020-0x11000 = 32
 # DIS-NEXT:          auipc ra, 0
-# DIS-NEXT:   11004: jalr ra, ra, 32
+# DIS-NEXT:   11004: jalr 32(ra)
 ## bar@plt - . = 0x11050-0x1100c = 72
 # DIS-NEXT:          auipc ra, 0
-# DIS-NEXT:   1100c: jalr ra, ra, 72
+# DIS-NEXT:   1100c: jalr 72(ra)
 ## bar@plt - . = 0x11050-0x11014 = 64
 # DIS-NEXT:          auipc ra, 0
-# DIS-NEXT:   11014: jalr ra, ra, 64
+# DIS-NEXT:   11014: jalr 64(ra)
 ## weak@plt - . = 0x11060-0x1101c = 72
 # DIS-NEXT:          auipc ra, 0
-# DIS-NEXT:   1101c: jalr ra, ra, 72
+# DIS-NEXT:   1101c: jalr 72(ra)
 # DIS:      foo:
 # DIS-NEXT:   11020:
 
@@ -79,14 +79,14 @@
 # DIS:        11050: auipc t3, 2
 # DIS32-NEXT:   lw t3, -72(t3)
 # DIS64-NEXT:   ld t3, -64(t3)
-# DIS-NEXT:     jalr t1, t3, 0
+# DIS-NEXT:     jalr t1, t3
 # DIS-NEXT:     nop
 
 ## 32-bit: &.got.plt[weak]-. = 0x1300c-0x11060 = 4096*2-84
 # DIS:        11060: auipc t3, 2
 # DIS32-NEXT:   lw t3, -84(t3)
 # DIS64-NEXT:   ld t3, -72(t3)
-# DIS-NEXT:     jalr t1, t3, 0
+# DIS-NEXT:     jalr t1, t3
 # DIS-NEXT:     nop
 
 .global _start, foo, bar

lld/test/ELF/riscv-tls-gd.s

@@ -56,13 +56,13 @@
 # GD32:      1000: auipc a0, 1
 # GD32-NEXT:       addi a0, a0, 112
 # GD32-NEXT:       auipc ra, 0
-# GD32-NEXT:       jalr ra, ra, 56
+# GD32-NEXT:       jalr 56(ra)
 
 ## &DTPMOD(b) - . = 0x2078 - 0x1010 = 4096*1+104
 # GD32:      1010: auipc a0, 1
 # GD32-NEXT:       addi a0, a0, 104
 # GD32-NEXT:       auipc ra, 0
-# GD32-NEXT:       jalr ra, ra, 40
+# GD32-NEXT:       jalr 40(ra)
 
 # GD64-REL:      .rela.dyn {
 # GD64-REL-NEXT:   0x20E0 R_RISCV_TLS_DTPMOD64 a 0x0
@@ -75,13 +75,13 @@
 # GD64:      1000: auipc a0, 1
 # GD64-NEXT:       addi a0, a0, 224
 # GD64-NEXT:       auipc ra, 0
-# GD64-NEXT:       jalr ra, ra, 56
+# GD64-NEXT:       jalr 56(ra)
 
 ## &DTPMOD(b) - . = 0x20f0 - 0x1010 = 4096*1+224
 # GD64:      1010: auipc a0, 1
 # GD64-NEXT:       addi a0, a0, 224
 # GD64-NEXT:       auipc ra, 0
-# GD64-NEXT:       jalr ra, ra, 40
+# GD64-NEXT:       jalr 40(ra)
 
 # NOREL: no relocations
 

lld/test/ELF/riscv-tls-ld.s

@@ -55,7 +55,7 @@
 # LD32-NEXT:       addi a0, a0, 124
 # LD64-NEXT:       addi a0, a0, 248
 # LD-NEXT:         auipc ra, 0
-# LD-NEXT:         jalr ra, ra, 56
+# LD-NEXT:         jalr 56(ra)
 
 # NOREL: no relocations
 
@@ -74,7 +74,7 @@
 # LE32-NEXT:        addi a0, a0, 4
 # LE64-NEXT:        addi a0, a0, 8
 # LE-NEXT:          auipc ra, 0
-# LE-NEXT:          jalr ra, ra, 24
+# LE-NEXT:          jalr 24(ra)
 
 la.tls.gd a0, .LANCHOR0
 call __tls_get_addr@plt