@@ -42,7 +42,112 @@ The *`no_builtins` [attribute]* may be applied at the crate level to disable
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optimizing certain code patterns to invocations of library functions that are
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assumed to exist.
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+ ## The ` target_feature ` attribute
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+
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+ The * ` target_feature ` [ attribute] * may be applied to an [ unsafe function] to
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+ enable code generation of that function for specific platform architecture
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+ features. It uses the [ _ MetaListNameValueStr_ ] syntax with a single key of
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+ ` enable ` whose value is a string of comma-separated feature names to enable.
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+
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+ ``` rust,ignore
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+ #[target_feature(enable = "avx2")]
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+ unsafe fn foo_avx2() {}
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+ ```
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+
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+ Each [ target architecture] has a set of features that may be enabled. It is an
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+ error to specify a feature for a target architecture that the crate is not
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+ being compiled for.
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+
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+ It is [ undefined behavior] to call a function that is compiled with a feature
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+ that is not supported on the current platform the code is running on.
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+
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+ Functions marked with ` target_feature ` are not inlined into a context that
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+ does not support the given features. The ` #[inline(always)] ` attribute may not
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+ be used with a ` target_feature ` attribute.
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+
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+ ### Available features
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+
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+ The following is a list of the available feature names.
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+
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+ #### ` x86 ` or ` x86_64 `
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+
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+ Feature | Implicitly Enables | Description
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+ ------------|--------------------|-------------------
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+ ` aes ` | ` sse2 ` | [ AES] — Advanced Encryption Standard
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+ ` avx ` | ` sse4.2 ` | [ AVX] — Advanced Vector Extensions
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+ ` avx2 ` | ` avx ` | [ AVX2] — Advanced Vector Extensions 2
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+ ` bmi1 ` | | [ BMI1] — Bit Manipulation Instruction Sets
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+ ` bmi2 ` | | [ BMI2] — Bit Manipulation Instruction Sets 2
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+ ` fma ` | ` avx ` | [ FMA3] — Three-operand fused multiply-add
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+ ` fxsr ` | | [ ` fxsave ` ] and [ ` fxrstor ` ] — Save and restore x87 FPU, MMX Technology, and SSE State
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+ ` lzcnt ` | | [ ` lzcnt ` ] — Leading zeros count
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+ ` pclmulqdq ` | ` sse2 ` | [ ` pclmulqdq ` ] — Packed carry-less multiplication quadword
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+ ` popcnt ` | | [ ` popcnt ` ] — Count of bits set to 1
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+ ` rdrand ` | | [ ` rdrand ` ] — Read random number
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+ ` rdseed ` | | [ ` rdseed ` ] — Read random seed
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+ ` sha ` | ` sse2 ` | [ SHA] — Secure Hash Algorithm
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+ ` sse ` | | [ SSE] — Streaming <abbr title =" Single Instruction Multiple Data " >SIMD</abbr > Extensions
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+ ` sse2 ` | ` sse ` | [ SSE2] — Streaming SIMD Extensions 2
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+ ` sse3 ` | ` sse2 ` | [ SSE3] — Streaming SIMD Extensions 3
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+ ` sse4.1 ` | ` sse3 ` | [ SSE4.1] — Streaming SIMD Extensions 4.1
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+ ` sse4.2 ` | ` sse4.1 ` | [ SSE4.2] — Streaming SIMD Extensions 4.2
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+ ` ssse3 ` | ` sse3 ` | [ SSSE3] — Supplemental Streaming SIMD Extensions 3
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+ ` xsave ` | | [ ` xsave ` ] — Save processor extended states
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+ ` xsavec ` | | [ ` xsavec ` ] — Save processor extended states with compaction
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+ ` xsaveopt ` | | [ ` xsaveopt ` ] — Save processor extended states optimized
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+ ` xsaves ` | | [ ` xsaves ` ] — Save processor extended states supervisor
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+
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+ <!-- Keep links near each table to make it easier to move and update. -->
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+
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+ [ AES ] : https://en.wikipedia.org/wiki/AES_instruction_set
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+ [ AVX ] : https://en.wikipedia.org/wiki/Advanced_Vector_Extensions
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+ [ AVX2 ] : https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#AVX2
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+ [ BMI1 ] : https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets
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+ [ BMI2 ] : https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#BMI2
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+ [ FMA3 ] : https://en.wikipedia.org/wiki/FMA_instruction_set
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+ [ `fxsave` ] : https://www.felixcloutier.com/x86/fxsave
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+ [ `fxrstor` ] : https://www.felixcloutier.com/x86/fxrstor
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+ [ `lzcnt` ] : https://www.felixcloutier.com/x86/lzcnt
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+ [ `pclmulqdq` ] : https://www.felixcloutier.com/x86/pclmulqdq
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+ [ `popcnt` ] : https://www.felixcloutier.com/x86/popcnt
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+ [ `rdrand` ] : https://en.wikipedia.org/wiki/RdRand
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+ [ `rdseed` ] : https://en.wikipedia.org/wiki/RdRand
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+ [ SHA ] : https://en.wikipedia.org/wiki/Intel_SHA_extensions
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+ [ SSE ] : https://en.wikipedia.org/wiki/Streaming_SIMD_Extensions
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+ [ SSE2 ] : https://en.wikipedia.org/wiki/SSE2
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+ [ SSE3 ] : https://en.wikipedia.org/wiki/SSE3
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+ [ SSE4.1 ] : https://en.wikipedia.org/wiki/SSE4#SSE4.1
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+ [ SSE4.2 ] : https://en.wikipedia.org/wiki/SSE4#SSE4.2
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+ [ SSSE3 ] : https://en.wikipedia.org/wiki/SSSE3
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+ [ `xsave` ] : https://www.felixcloutier.com/x86/xsave
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+ [ `xsavec` ] : https://www.felixcloutier.com/x86/xsavec
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+ [ `xsaveopt` ] : https://www.felixcloutier.com/x86/xsaveopt
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+ [ `xsaves` ] : https://www.felixcloutier.com/x86/xsaves
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+
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+ ### Additional information
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+
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+ See the [ ` target_feature ` conditional compilation option] for selectively
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+ enabling or disabling compilation of code based on compile-time settings. Note
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+ that this option is not affected by the ` target_feature ` attribute, and is
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+ only driven by the features enabled for the entire crate.
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+
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+ See the [ ` is_x86_feature_detected ` ] macro in the standard library for runtime
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+ feature detection on the x86 platforms.
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+
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+ > Note: ` rustc ` has a default set of features enabled for each target and CPU.
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+ > The CPU may be chosen with the [ ` -C target-cpu ` ] flag. Individual features
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+ > may be enabled or disabled for an entire crate with the
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+ > [ ` -C target-feature ` ] flag.
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+
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+ [ _MetaListNameValueStr_ ] : attributes.html#meta-item-attribute-syntax
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+ [ `-C target-cpu` ] : ../rustc/codegen-options/index.html#target-cpu
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+ [ `-C target-feature` ] : ../rustc/codegen-options/index.html#target-feature
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+ [ `is_x86_feature_detected` ] : ../std/macro.is_x86_feature_detected.html
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+ [ `target_feature` conditional compilation option ] : conditional-compilation.html#target_feature
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[ attribute ] : attributes.html
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[ attributes ] : attributes.html
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[ functions ] : items/functions.html
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+ [ target architecture ] : conditional-compilation.html#target_arch
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[ trait ] : items/traits.html
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+ [ undefined behavior ] : behavior-considered-undefined.html
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+ [ unsafe function ] : unsafe-functions.html
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