|
| 1 | +/** |
| 2 | + * Marlin 3D Printer Firmware |
| 3 | + * |
| 4 | + * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] |
| 5 | + * SAMD51 HAL developed by Giuliano Zaro (AKA GMagician) |
| 6 | + * |
| 7 | + * This program is free software: you can redistribute it and/or modify |
| 8 | + * it under the terms of the GNU General Public License as published by |
| 9 | + * the Free Software Foundation, either version 3 of the License, or |
| 10 | + * (at your option) any later version. |
| 11 | + * |
| 12 | + * This program is distributed in the hope that it will be useful, |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | + * GNU General Public License for more details. |
| 16 | + * |
| 17 | + * You should have received a copy of the GNU General Public License |
| 18 | + * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 19 | + * |
| 20 | + */ |
| 21 | + |
| 22 | +#ifdef __SAMD51__ |
| 23 | + |
| 24 | +#include "../../inc/MarlinConfig.h" |
| 25 | + |
| 26 | +#if ENABLED(FLASH_EEPROM_EMULATION) |
| 27 | + |
| 28 | +#include "../shared/eeprom_api.h" |
| 29 | + |
| 30 | +#define NVMCTRL_CMD(c) do{ \ |
| 31 | + SYNC(!NVMCTRL->STATUS.bit.READY); \ |
| 32 | + NVMCTRL->INTFLAG.bit.DONE = true; \ |
| 33 | + NVMCTRL->CTRLB.reg = c | NVMCTRL_CTRLB_CMDEX_KEY; \ |
| 34 | + SYNC(NVMCTRL->INTFLAG.bit.DONE); \ |
| 35 | + }while(0) |
| 36 | +#define NVMCTRL_FLUSH() do{ \ |
| 37 | + if (NVMCTRL->SEESTAT.bit.LOAD) \ |
| 38 | + NVMCTRL_CMD(NVMCTRL_CTRLB_CMD_SEEFLUSH); \ |
| 39 | + }while(0) |
| 40 | + |
| 41 | +size_t PersistentStore::capacity() { |
| 42 | + const uint8_t psz = NVMCTRL->SEESTAT.bit.PSZ, |
| 43 | + sblk = NVMCTRL->SEESTAT.bit.SBLK; |
| 44 | + |
| 45 | + return (!psz && !sblk) ? 0 |
| 46 | + : (psz <= 2) ? (0x200 << psz) |
| 47 | + : (sblk == 1 || psz == 3) ? 4096 |
| 48 | + : (sblk == 2 || psz == 4) ? 8192 |
| 49 | + : (sblk <= 4 || psz == 5) ? 16384 |
| 50 | + : (sblk >= 9 && psz == 7) ? 65536 |
| 51 | + : 32768; |
| 52 | +} |
| 53 | + |
| 54 | +bool PersistentStore::access_start() { |
| 55 | + NVMCTRL->SEECFG.reg = NVMCTRL_SEECFG_WMODE_BUFFERED; // Buffered mode and segment reallocation active |
| 56 | + if (NVMCTRL->SEESTAT.bit.RLOCK) |
| 57 | + NVMCTRL_CMD(NVMCTRL_CTRLB_CMD_USEE); // Unlock E2P data write access |
| 58 | + return true; |
| 59 | +} |
| 60 | + |
| 61 | +bool PersistentStore::access_finish() { |
| 62 | + NVMCTRL_FLUSH(); |
| 63 | + if (!NVMCTRL->SEESTAT.bit.LOCK) |
| 64 | + NVMCTRL_CMD(NVMCTRL_CTRLB_CMD_LSEE); // Lock E2P data write access |
| 65 | + return true; |
| 66 | +} |
| 67 | + |
| 68 | +bool PersistentStore::write_data(int &pos, const uint8_t *value, size_t size, uint16_t *crc) { |
| 69 | + while (size--) { |
| 70 | + const uint8_t v = *value; |
| 71 | + SYNC(NVMCTRL->SEESTAT.bit.BUSY); |
| 72 | + if (NVMCTRL->INTFLAG.bit.SEESFULL) |
| 73 | + NVMCTRL_FLUSH(); // Next write will trigger a sector reallocation. I need to flush 'pagebuffer' |
| 74 | + ((volatile uint8_t *)SEEPROM_ADDR)[pos] = v; |
| 75 | + SYNC(!NVMCTRL->INTFLAG.bit.SEEWRC); |
| 76 | + crc16(crc, &v, 1); |
| 77 | + pos++; |
| 78 | + value++; |
| 79 | + } |
| 80 | + return false; |
| 81 | +} |
| 82 | + |
| 83 | +bool PersistentStore::read_data(int &pos, uint8_t* value, size_t size, uint16_t *crc, const bool writing/*=true*/) { |
| 84 | + while (size--) { |
| 85 | + SYNC(NVMCTRL->SEESTAT.bit.BUSY); |
| 86 | + uint8_t c = ((volatile uint8_t *)SEEPROM_ADDR)[pos]; |
| 87 | + if (writing) *value = c; |
| 88 | + crc16(crc, &c, 1); |
| 89 | + pos++; |
| 90 | + value++; |
| 91 | + } |
| 92 | + return false; |
| 93 | +} |
| 94 | + |
| 95 | +#endif // FLASH_EEPROM_EMULATION |
| 96 | +#endif // __SAMD51__ |
0 commit comments