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px4_fmu-v6xrt:Use BOARD_HAS_HW_SPLIT_VERSIONING & common PAB manifest
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davids5 committed Jan 26, 2024
1 parent d3c548b commit 7ed20ec
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Showing 7 changed files with 19 additions and 241 deletions.
2 changes: 1 addition & 1 deletion boards/px4/fmu-v6xrt/init/rc.board_mavlink
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Expand Up @@ -4,7 +4,7 @@
#------------------------------------------------------------------------------

# if skynode base board is detected start Mavlink on Telem2
if ver hwtypecmp V6XRT009000 V6XRT010000
if ver hwbasecmp 009 010
then
mavlink start -d /dev/ttyS5 -b 3000000 -r 290000 -m onboard_low_bandwidth -x -z

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4 changes: 2 additions & 2 deletions boards/px4/fmu-v6xrt/init/rc.board_sensors
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@@ -1,6 +1,6 @@
#!/bin/sh
#
# PX4 FMUv6X-RT specific board sensors init
# PX4 FMUv6xrt specific board sensors init
#------------------------------------------------------------------------------
#
# UART mapping on PX4 FMU-V6XRT:
Expand All @@ -18,7 +18,7 @@

set HAVE_PM2 yes

if ver hwtypecmp V6XRT005000
if mft query -q -k MFT -s MFT_PM2 -v 0
then
set HAVE_PM2 no
fi
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1 change: 0 additions & 1 deletion boards/px4/fmu-v6xrt/src/CMakeLists.txt
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Expand Up @@ -66,7 +66,6 @@ else()
i2c.cpp
init.c
led.c
manifest.c
mtd.cpp
sdhc.c
spi.cpp
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10 changes: 4 additions & 6 deletions boards/px4/fmu-v6xrt/src/board_config.h
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Expand Up @@ -288,7 +288,7 @@

/* HW Version and Revision drive signals Default to 1 to detect */

#define BOARD_HAS_HW_VERSIONING // migrate to Split
#define BOARD_HAS_HW_SPLIT_VERSIONING

#define HW_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_NONE | IOMUX_SLEW_FAST)

Expand All @@ -297,11 +297,9 @@
#define GPIO_HW_VER_SENSE /* GPIO_AD_23 GPIO9 Pin 22 */ ADC_GPIO(5, 22)
#define HW_INFO_INIT_PREFIX "V6XRT"

#define BOARD_NUM_SPI_CFG_HW_VERSIONS 3 // Rev 0 on HB Base and T1 Base
// Base/FMUM
#define V6XRT_00 HW_VER_REV(0x0,0x0) // First Release
#define V6XRT_30 HW_VER_REV(0x3,0x0) // T1 Base w/o PX4IO
#define V6XRT_50 HW_VER_REV(0x5,0x0) // HB Mini Rev 0
#define BOARD_NUM_SPI_CFG_HW_VERSIONS 2 // Rev 0 & 1
#define V6XRT_0 HW_FMUM_ID(0x0) // First Release
#define V6XRT_1 HW_FMUM_ID(0x1) // Next Release

#define BOARD_I2C_LATEINIT 1 /* See Note about SE550 Eanable */

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208 changes: 0 additions & 208 deletions boards/px4/fmu-v6xrt/src/manifest.c

This file was deleted.

12 changes: 10 additions & 2 deletions boards/px4/fmu-v6xrt/src/mtd.cpp
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Expand Up @@ -31,6 +31,9 @@
*
****************************************************************************/

#include <nuttx/config.h>
#include <board_config.h>

#include <nuttx/spi/spi.h>
#include <px4_platform_common/px4_manifest.h>

Expand Down Expand Up @@ -120,10 +123,15 @@ static const px4_mft_entry_s mtd_mft = {
.pmft = (void *) &board_mtd_config,
};

static const px4_mft_entry_s mft_mft = {
.type = MFT,
.pmft = (void *) system_query_manifest,
};
static const px4_mft_s mft = {
.nmft = 1,
.nmft = 2,
.mfts = {
&mtd_mft
&mtd_mft,
&mft_mft,
}
};

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23 changes: 2 additions & 21 deletions boards/px4/fmu-v6xrt/src/spi.cpp
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Expand Up @@ -42,7 +42,7 @@
#include <nuttx/spi/spi.h>

constexpr px4_spi_bus_all_hw_t px4_spi_buses_all_hw[BOARD_NUM_SPI_CFG_HW_VERSIONS] = {
initSPIHWVersion(V6XRT_00, {
initSPIFmumID(V6XRT_0, {
initSPIBus(SPI::Bus::LPSPI1, {
initSPIDevice(DRV_IMU_DEVTYPE_ICM42686P, SPI::CS{GPIO::Port2, GPIO::Pin11}, SPI::DRDY{GPIO::Port3, GPIO::Pin19}), /* GPIO_EMC_B2_01 GPIO2_IO11, GPIO_AD_20, GPIO3_IO19 */
}, {GPIO::Port2, GPIO::Pin1}), // Power GPIO_EMC_B1_33 GPIO2_IO01
Expand All @@ -62,26 +62,7 @@ constexpr px4_spi_bus_all_hw_t px4_spi_buses_all_hw[BOARD_NUM_SPI_CFG_HW_VERSION
}),
}),

initSPIHWVersion(V6XRT_30, {
initSPIBus(SPI::Bus::LPSPI1, {
initSPIDevice(DRV_IMU_DEVTYPE_ICM42686P, SPI::CS{GPIO::Port2, GPIO::Pin11}, SPI::DRDY{GPIO::Port3, GPIO::Pin19}), /* GPIO_EMC_B2_01 GPIO2_IO11, GPIO_AD_20, GPIO3_IO19 */
}, {GPIO::Port2, GPIO::Pin1}), // Power GPIO_EMC_B1_33 GPIO2_IO01

initSPIBus(SPI::Bus::LPSPI2, {
initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::Port3, GPIO::Pin24}, SPI::DRDY{GPIO::Port2, GPIO::Pin7}), /* GPIO_AD_25 GPIO3_IO24, GPIO_EMC_B1_39 GPIO2_IO07 */
}, {GPIO::Port1, GPIO::Pin22}), // Power GPIO_EMC_B1_22 GPIO1_IO22

initSPIBus(SPI::Bus::LPSPI3, {
initSPIDevice(DRV_GYR_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin18}, SPI::DRDY{GPIO::Port2, GPIO::Pin28}), /* GPIO_EMC_B2_08 GPIO2_IO18, GPIO_EMC_B2_18 GPIO2_IO28 */
initSPIDevice(DRV_ACC_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin15}), /* GPIO_EMC_B2_05 GPIO2_IO15 */
}, {GPIO::Port1, GPIO::Pin14}), // Power GPIO_EMC_B1_14 GPIO1_IO14

initSPIBusExternal(SPI::Bus::LPSPI6, {
initSPIConfigExternal(SPI::CS{GPIO::Port6, GPIO::Pin9}, SPI::DRDY{GPIO::Port1, GPIO::Pin5}), /* GPIO_LPSR_09 GPIO6_IO09 GPIO_EMC_B1_05 GPIO1_IO05*/
initSPIConfigExternal(SPI::CS{GPIO::Port6, GPIO::Pin8}, SPI::DRDY{GPIO::Port1, GPIO::Pin7}), /* GPIO_LPSR_08 GPIO6_IO08 GPIO_EMC_B1_07 GPIO1_IO07*/
}),
}),
initSPIHWVersion(V6XRT_50, {
initSPIFmumID(V6XRT_1, {
initSPIBus(SPI::Bus::LPSPI1, {
initSPIDevice(DRV_IMU_DEVTYPE_ICM42686P, SPI::CS{GPIO::Port2, GPIO::Pin11}, SPI::DRDY{GPIO::Port3, GPIO::Pin19}), /* GPIO_EMC_B2_01 GPIO2_IO11, GPIO_AD_20, GPIO3_IO19 */
}, {GPIO::Port2, GPIO::Pin1}), // Power GPIO_EMC_B1_33 GPIO2_IO01
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