|
| 1 | +// SPDX-License-Identifier: GPL-2.0 |
| 2 | +/* |
| 3 | + * cache.c - Intel VT-d cache invalidation |
| 4 | + * |
| 5 | + * Copyright (C) 2024 Intel Corporation |
| 6 | + * |
| 7 | + * Author: Lu Baolu <baolu.lu@linux.intel.com> |
| 8 | + */ |
| 9 | + |
| 10 | +#define pr_fmt(fmt) "DMAR: " fmt |
| 11 | + |
| 12 | +#include <linux/dmar.h> |
| 13 | +#include <linux/iommu.h> |
| 14 | +#include <linux/memory.h> |
| 15 | +#include <linux/spinlock.h> |
| 16 | + |
| 17 | +#include "iommu.h" |
| 18 | +#include "pasid.h" |
| 19 | + |
| 20 | +/* Check if an existing cache tag can be reused for a new association. */ |
| 21 | +static bool cache_tage_match(struct cache_tag *tag, u16 domain_id, |
| 22 | + struct intel_iommu *iommu, struct device *dev, |
| 23 | + ioasid_t pasid, enum cache_tag_type type) |
| 24 | +{ |
| 25 | + if (tag->type != type) |
| 26 | + return false; |
| 27 | + |
| 28 | + if (tag->domain_id != domain_id || tag->pasid != pasid) |
| 29 | + return false; |
| 30 | + |
| 31 | + if (type == CACHE_TAG_IOTLB || type == CACHE_TAG_NESTING_IOTLB) |
| 32 | + return tag->iommu == iommu; |
| 33 | + |
| 34 | + if (type == CACHE_TAG_DEVTLB || type == CACHE_TAG_NESTING_DEVTLB) |
| 35 | + return tag->dev == dev; |
| 36 | + |
| 37 | + return false; |
| 38 | +} |
| 39 | + |
| 40 | +/* Assign a cache tag with specified type to domain. */ |
| 41 | +static int cache_tag_assign(struct dmar_domain *domain, u16 did, |
| 42 | + struct device *dev, ioasid_t pasid, |
| 43 | + enum cache_tag_type type) |
| 44 | +{ |
| 45 | + struct device_domain_info *info = dev_iommu_priv_get(dev); |
| 46 | + struct intel_iommu *iommu = info->iommu; |
| 47 | + struct cache_tag *tag, *temp; |
| 48 | + unsigned long flags; |
| 49 | + |
| 50 | + tag = kzalloc(sizeof(*tag), GFP_KERNEL); |
| 51 | + if (!tag) |
| 52 | + return -ENOMEM; |
| 53 | + |
| 54 | + tag->type = type; |
| 55 | + tag->iommu = iommu; |
| 56 | + tag->domain_id = did; |
| 57 | + tag->pasid = pasid; |
| 58 | + tag->users = 1; |
| 59 | + |
| 60 | + if (type == CACHE_TAG_DEVTLB || type == CACHE_TAG_NESTING_DEVTLB) |
| 61 | + tag->dev = dev; |
| 62 | + else |
| 63 | + tag->dev = iommu->iommu.dev; |
| 64 | + |
| 65 | + spin_lock_irqsave(&domain->cache_lock, flags); |
| 66 | + list_for_each_entry(temp, &domain->cache_tags, node) { |
| 67 | + if (cache_tage_match(temp, did, iommu, dev, pasid, type)) { |
| 68 | + temp->users++; |
| 69 | + spin_unlock_irqrestore(&domain->cache_lock, flags); |
| 70 | + kfree(tag); |
| 71 | + return 0; |
| 72 | + } |
| 73 | + } |
| 74 | + list_add_tail(&tag->node, &domain->cache_tags); |
| 75 | + spin_unlock_irqrestore(&domain->cache_lock, flags); |
| 76 | + |
| 77 | + return 0; |
| 78 | +} |
| 79 | + |
| 80 | +/* Unassign a cache tag with specified type from domain. */ |
| 81 | +static void cache_tag_unassign(struct dmar_domain *domain, u16 did, |
| 82 | + struct device *dev, ioasid_t pasid, |
| 83 | + enum cache_tag_type type) |
| 84 | +{ |
| 85 | + struct device_domain_info *info = dev_iommu_priv_get(dev); |
| 86 | + struct intel_iommu *iommu = info->iommu; |
| 87 | + struct cache_tag *tag; |
| 88 | + unsigned long flags; |
| 89 | + |
| 90 | + spin_lock_irqsave(&domain->cache_lock, flags); |
| 91 | + list_for_each_entry(tag, &domain->cache_tags, node) { |
| 92 | + if (cache_tage_match(tag, did, iommu, dev, pasid, type)) { |
| 93 | + if (--tag->users == 0) { |
| 94 | + list_del(&tag->node); |
| 95 | + kfree(tag); |
| 96 | + } |
| 97 | + break; |
| 98 | + } |
| 99 | + } |
| 100 | + spin_unlock_irqrestore(&domain->cache_lock, flags); |
| 101 | +} |
| 102 | + |
| 103 | +static int __cache_tag_assign_domain(struct dmar_domain *domain, u16 did, |
| 104 | + struct device *dev, ioasid_t pasid) |
| 105 | +{ |
| 106 | + struct device_domain_info *info = dev_iommu_priv_get(dev); |
| 107 | + int ret; |
| 108 | + |
| 109 | + ret = cache_tag_assign(domain, did, dev, pasid, CACHE_TAG_IOTLB); |
| 110 | + if (ret || !info->ats_enabled) |
| 111 | + return ret; |
| 112 | + |
| 113 | + ret = cache_tag_assign(domain, did, dev, pasid, CACHE_TAG_DEVTLB); |
| 114 | + if (ret) |
| 115 | + cache_tag_unassign(domain, did, dev, pasid, CACHE_TAG_IOTLB); |
| 116 | + |
| 117 | + return ret; |
| 118 | +} |
| 119 | + |
| 120 | +static void __cache_tag_unassign_domain(struct dmar_domain *domain, u16 did, |
| 121 | + struct device *dev, ioasid_t pasid) |
| 122 | +{ |
| 123 | + struct device_domain_info *info = dev_iommu_priv_get(dev); |
| 124 | + |
| 125 | + cache_tag_unassign(domain, did, dev, pasid, CACHE_TAG_IOTLB); |
| 126 | + |
| 127 | + if (info->ats_enabled) |
| 128 | + cache_tag_unassign(domain, did, dev, pasid, CACHE_TAG_DEVTLB); |
| 129 | +} |
| 130 | + |
| 131 | +static int __cache_tag_assign_parent_domain(struct dmar_domain *domain, u16 did, |
| 132 | + struct device *dev, ioasid_t pasid) |
| 133 | +{ |
| 134 | + struct device_domain_info *info = dev_iommu_priv_get(dev); |
| 135 | + int ret; |
| 136 | + |
| 137 | + ret = cache_tag_assign(domain, did, dev, pasid, CACHE_TAG_NESTING_IOTLB); |
| 138 | + if (ret || !info->ats_enabled) |
| 139 | + return ret; |
| 140 | + |
| 141 | + ret = cache_tag_assign(domain, did, dev, pasid, CACHE_TAG_NESTING_DEVTLB); |
| 142 | + if (ret) |
| 143 | + cache_tag_unassign(domain, did, dev, pasid, CACHE_TAG_NESTING_IOTLB); |
| 144 | + |
| 145 | + return ret; |
| 146 | +} |
| 147 | + |
| 148 | +static void __cache_tag_unassign_parent_domain(struct dmar_domain *domain, u16 did, |
| 149 | + struct device *dev, ioasid_t pasid) |
| 150 | +{ |
| 151 | + struct device_domain_info *info = dev_iommu_priv_get(dev); |
| 152 | + |
| 153 | + cache_tag_unassign(domain, did, dev, pasid, CACHE_TAG_NESTING_IOTLB); |
| 154 | + |
| 155 | + if (info->ats_enabled) |
| 156 | + cache_tag_unassign(domain, did, dev, pasid, CACHE_TAG_NESTING_DEVTLB); |
| 157 | +} |
| 158 | + |
| 159 | +static u16 domain_get_id_for_dev(struct dmar_domain *domain, struct device *dev) |
| 160 | +{ |
| 161 | + struct device_domain_info *info = dev_iommu_priv_get(dev); |
| 162 | + struct intel_iommu *iommu = info->iommu; |
| 163 | + |
| 164 | + /* |
| 165 | + * The driver assigns different domain IDs for all domains except |
| 166 | + * the SVA type. |
| 167 | + */ |
| 168 | + if (domain->domain.type == IOMMU_DOMAIN_SVA) |
| 169 | + return FLPT_DEFAULT_DID; |
| 170 | + |
| 171 | + return domain_id_iommu(domain, iommu); |
| 172 | +} |
| 173 | + |
| 174 | +/* |
| 175 | + * Assign cache tags to a domain when it's associated with a device's |
| 176 | + * PASID using a specific domain ID. |
| 177 | + * |
| 178 | + * On success (return value of 0), cache tags are created and added to the |
| 179 | + * domain's cache tag list. On failure (negative return value), an error |
| 180 | + * code is returned indicating the reason for the failure. |
| 181 | + */ |
| 182 | +int cache_tag_assign_domain(struct dmar_domain *domain, |
| 183 | + struct device *dev, ioasid_t pasid) |
| 184 | +{ |
| 185 | + u16 did = domain_get_id_for_dev(domain, dev); |
| 186 | + int ret; |
| 187 | + |
| 188 | + ret = __cache_tag_assign_domain(domain, did, dev, pasid); |
| 189 | + if (ret || domain->domain.type != IOMMU_DOMAIN_NESTED) |
| 190 | + return ret; |
| 191 | + |
| 192 | + ret = __cache_tag_assign_parent_domain(domain->s2_domain, did, dev, pasid); |
| 193 | + if (ret) |
| 194 | + __cache_tag_unassign_domain(domain, did, dev, pasid); |
| 195 | + |
| 196 | + return ret; |
| 197 | +} |
| 198 | + |
| 199 | +/* |
| 200 | + * Remove the cache tags associated with a device's PASID when the domain is |
| 201 | + * detached from the device. |
| 202 | + * |
| 203 | + * The cache tags must be previously assigned to the domain by calling the |
| 204 | + * assign interface. |
| 205 | + */ |
| 206 | +void cache_tag_unassign_domain(struct dmar_domain *domain, |
| 207 | + struct device *dev, ioasid_t pasid) |
| 208 | +{ |
| 209 | + u16 did = domain_get_id_for_dev(domain, dev); |
| 210 | + |
| 211 | + __cache_tag_unassign_domain(domain, did, dev, pasid); |
| 212 | + if (domain->domain.type == IOMMU_DOMAIN_NESTED) |
| 213 | + __cache_tag_unassign_parent_domain(domain->s2_domain, did, dev, pasid); |
| 214 | +} |
0 commit comments