clkdiv: added clkdiv #4
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This change allows arbitrary divider values to be used for the 6MHz FTDI SPI/JTAG clock. I find that, on the Lattice NX Evaluation Board, the FTDI clock divider needs to be set to a value of 3 or higher in order to program the flash rom. This may be because the board uses an ES (Early Silicon/Engineering Sample) CrossLink/NX-40. I see similar behavior with the Radiant programmer where a divisor of 2 or higher is needed. With a slower clock divider, ecpprog is also able to verify programmed flash rom content.
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This addresses some problems noted in issue #3 |
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Looks good! Thanks! :D |
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This change allows arbitrary divider values to be used for the 6MHz FTDI
SPI/JTAG clock.
I find that, on the Lattice NX Evaluation Board, the FTDI clock divider
needs to be set to a value of 3 or higher in order to program the flash
rom. This may be because the board uses an ES (Early Silicon/Engineering
Sample) CrossLink/NX-40. I see similar behavior with the Radiant
programmer where a divisor of 2 or higher is needed.
With a slower clock divider, ecpprog is also able to verify programmed
flash rom content.