Fast multi-thread FEC simulator & library of efficient digital communication algorithms for SDR.

Simple OFDM modem for transceiving datagrams

Reusable C++ coding-related code library

Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..

Rate adaptive LDPC based solutions for distributed source coding

Progressive edge growth PEG for LDPC code and QC-LDPC construction C++, Python, Matlab PEG with ACE and Avoiding Generating Small Cycles

5G NR LDPC C++ Implementation

Tool-chain to construct Length and Rate adaptive MET QC-LDPC Codes using EMD Spectrum and Hamming distance optimization

LDPC codes as implemented by me. both soft & hard decoding. Comments around. C++14 and above

Fast C++17 Simulation Tool for LDPC Codes with Multithreading Support

Research into algorithms and techniques for faster cycle enumeration on undirected graphs (LDPC Codes).

LDPC & comparison are placed here for next-gen FEC (ECC). Ultra optimal design for performance, power, area, reliability,and flexibility.

LDPC development and verification Kit

LDPC with SIMD aimed at AMD CPUs.

A simulator for QC-LDPC code

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