GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
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Updated
Apr 23, 2023 - C++
GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
VLSI EDA Global Router
A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
Simplify VLSI (timing, power, noise, correlation, reliability) modeling and analysis with Characterization Description Format
VLSI sketches & Arduino Code for the Android-controlled Multiple Hazard Detection, Path Retracing, and Rescue Robot, or AMRBot.
A generic object oriented library for solving optimizations problems with heuristic approaches + second-phase Genetic algorithm optimizations
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