[SYCL][FPGA][NFC] Tidy up intel_fpga_reg codegen test #3810
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Checks for Clang::CodeGenSYCL/intel-fpga-reg.cpp test were autogenerated to speed up fixing of LIT tests failures after a patch "[SYCL] Refactor address space handling in CodeGen library (intel#2864)". Reorganize test code and tidy up checks to improve readability. Signed-off-by: Mikhail Lychkov <mikhail.lychkov@intel.com>
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* sycl: (320 commits) [SYCL] Silence a "local variable is initialized but not referenced" warning; NFC (intel#3870) [SYCL] Improve SYCL_DEVICE_ALLOWLIST (intel#3826) [SPIR-V] Change return value of mapType function (intel#3871) [SYCL] Fix post-commit failure in handler.hpp from unused-parameters. (intel#3874) [Driver][SYCL] Do not imply defaultlib msvcrt for Linux based driver on Windows (intel#3827) [SYCL] Unique stable name rebase (intel#3835) [SYCL] Align behavior of empty command groups with SYCL2020 (intel#3822) [SYCL][ESIMD] Make typenames and constants consistent with SYCL API style. (intel#3850) [SYCL] Allow __failed_assertion to support libstdc++-11 (intel#3774) [SYCL] Refactor stream class handing implementation (intel#3646) [SYCL] Fix syntax error introduced in intel#3401 (intel#3861) [SYCL] SYCL 2020 sub_group algorithms (intel#3786) [Buildbot][NFC] Add option to use LLD as linker (intel#3866) Revert "Emit correct location lists with basic block sections." [SPIRITTAnnotations] Fix debug info for ITT calls. (intel#3829) [SYCL][Doc] Fix build of Sphinx docs (intel#3863) [SYCL][FPGA][NFC] Tidy up intel_fpga_reg codegen test (intel#3810) [CODEOWNERS] Fix SPIRITTAnnnotations tests ownership (intel#3859) [SYCL][ESIMD] Host-compile simd.cpp test, fix errors & warnings. (intel#3846) [SYCL] Store pointers to memory allocations instead of iterators (intel#3860) ...
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Checks for Clang::CodeGenSYCL/intel-fpga-reg.cpp test were autogenerated
to speed up fixing of LIT tests failures after a patch
"[SYCL] Refactor address space handling in CodeGen library (#2864)".
Reorganize test code and tidy up checks to improve readability.
Signed-off-by: Mikhail Lychkov mikhail.lychkov@intel.com